From b2b36316626f0d6b92c3675a2aa2726efc71d146 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <maz@misterjones.org>
Date: Thu, 5 Nov 2009 08:10:10 +0100
Subject: [PATCH] [ARM] pxa: fix interrupts number calculation when
 CONFIG_PXA_HAVE_ISA_IRQS=y

Commit d2c37068429b29d6549cf3486fc84b836689e122 ([ARM] pxa:
initialize default interrupt priority and use ICHP for IRQ handling)
broke ISA interrupt support on pxa27x/3xx.

In such a case, PXA_IRQ(0) != 0, and the IRQ number computed from
ICHP must be offset by PXA_IRQ(0).

Tested on an Arcom Zeus (pxa270), with both CONFIG_PXA_HAVE_ISA_IRQS
enabled and disabled.

Signed-off-by: Marc Zyngier <maz@misterjones.org>
Tested-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
---
 arch/arm/mach-pxa/include/mach/entry-macro.S | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index 241880608ac6..a73bc86a3c26 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -46,5 +46,6 @@
 		beq	1001f
 		bic	\irqstat, \irqstat, #0x80000000
 		mov	\irqnr, \irqstat, lsr #16
+		add	\irqnr, \irqnr, #(PXA_IRQ(0))
 1001:
 		.endm
-- 
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