diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index b8bd6ed22b84ad15aefd6931b8dca161e2742d17..7e879d27ce0b31cc109eeacd32bcb2ebeca71cd4 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -255,7 +255,7 @@ static int qm_wait_mb_ready(struct hisi_qm *qm) } /* 128 bit should be wrote to hardware at one time to trigger a mailbox */ -static void qm_mb_write(struct hisi_qm *qm, void *src) +static void qm_mb_write(struct hisi_qm *qm, const void *src) { void __iomem *fun_base = qm->io_base + QM_MB_CMD_SEND_BASE; unsigned long tmp0 = 0, tmp1 = 0; @@ -646,7 +646,8 @@ static void qm_vft_data_cfg(struct hisi_qm *qm, enum vft_type type, u32 base, static int qm_set_vft_common(struct hisi_qm *qm, enum vft_type type, u32 fun_num, u32 base, u32 number) { - int val, ret; + int ret; + unsigned int val; ret = readl_relaxed_poll_timeout(qm->io_base + QM_VFT_CFG_RDY, val, val & BIT(0), POLL_PERIOD, @@ -1305,7 +1306,7 @@ EXPORT_SYMBOL_GPL(hisi_qm_stop_qp); * This function will return -EBUSY if qp is currently full, and -EAGAIN * if qp related qm is resetting. */ -int hisi_qp_send(struct hisi_qp *qp, void *msg) +int hisi_qp_send(struct hisi_qp *qp, const void *msg) { struct hisi_qp_status *qp_status = &qp->qp_status; u16 sq_tail = qp_status->sq_tail; @@ -1358,7 +1359,7 @@ EXPORT_SYMBOL_GPL(hisi_qp_wait); static void hisi_qm_cache_wb(struct hisi_qm *qm) { - int val; + unsigned int val; if (qm->ver == QM_HW_V2) { writel(0x1, qm->io_base + QM_CACHE_WB_START); @@ -2243,7 +2244,7 @@ void hisi_qm_clear_queues(struct hisi_qm *qm) struct hisi_qp *qp; int i; - for (i = 0; i < qm->qp_num; i++, qp++) { + for (i = 0; i < qm->qp_num; i++) { qp = qm->qp_array[i]; if (qp) { memset(qp->qdma.va, 0, qp->qdma.size); diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h index 752efabdf80842155c7dde8f0c85ddb093406cb5..d2daeae631eb65faaa4451f168b6eb4b2d0c37af 100644 --- a/drivers/crypto/hisilicon/qm.h +++ b/drivers/crypto/hisilicon/qm.h @@ -311,7 +311,7 @@ struct hisi_qp *hisi_qm_create_qp(struct hisi_qm *qm, u8 alg_type); int hisi_qm_start_qp(struct hisi_qp *qp, unsigned long arg); int hisi_qm_stop_qp(struct hisi_qp *qp); void hisi_qm_release_qp(struct hisi_qp *qp); -int hisi_qp_send(struct hisi_qp *qp, void *msg); +int hisi_qp_send(struct hisi_qp *qp, const void *msg); int hisi_qp_wait(struct hisi_qp *qp); int hisi_qm_get_vft(struct hisi_qm *qm, u32 *base, u32 *number); int hisi_qm_set_vft(struct hisi_qm *qm, u32 fun_num, u32 base, u32 number); diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c index 4337a1e58529ca64b31f342f435f950d591f8360..da13924e04462cabea69e235467b68bd77ccbb96 100644 --- a/drivers/crypto/hisilicon/zip/zip_main.c +++ b/drivers/crypto/hisilicon/zip/zip_main.c @@ -718,7 +718,7 @@ static int hisi_zip_probe(struct pci_dev *pdev, const struct pci_device_id *id) } /* now we only support equal assignment */ -static int hisi_zip_vf_q_assign(struct hisi_zip *hisi_zip, int num_vfs) +static int hisi_zip_vf_q_assign(struct hisi_zip *hisi_zip, u32 num_vfs) { struct hisi_qm *qm = &hisi_zip->qm; u32 qp_num = qm->qp_num; diff --git a/include/linux/uacce.h b/include/linux/uacce.h index 7c4fb78d1461d9b38500e383c7ec0b18e2081798..eae9f1a48add74adbd43372afba5939f49dca843 100644 --- a/include/linux/uacce.h +++ b/include/linux/uacce.h @@ -22,7 +22,7 @@ struct uacce_qfile_region { enum uacce_qfrt type; unsigned long iova; /* iova share between user and device space */ struct page **pages; - int nr_pages; + unsigned int nr_pages; unsigned long prot; int flags; struct list_head qs; /* qs sharing the same region, for ss */