omap: mailbox: correct OMAP4 reset logic

OMAP4 mailbox has a different register set. There is
no MAILBOX_SYSSTATUS register. The reset is indicated
with the SOFTRESET bit of the MAILBOX_SYSCONFIG register
itself. This bit should read 0 for a successful Reset.
Also, the SOFTRESET bit occupies bit0 and not bit1 as with
previous generations.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Acked-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

arch/arm/mach-omap2/mailbox.c

@@ -40,6 +40,7 @@
 #define AUTOIDLE	(1 << 0)
 #define SOFTRESET	(1 << 1)
 #define SMARTIDLE	(2 << 3)
+#define OMAP4_SOFTRESET	(1 << 0)
 
 /* SYSSTATUS: register bit definition */
 #define RESETDONE	(1 << 0)
@@ -99,6 +100,20 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
 	}
 	clk_enable(mbox_ick_handle);
 
+	if (cpu_is_omap44xx()) {
+		mbox_write_reg(OMAP4_SOFTRESET, MAILBOX_SYSCONFIG);
+		timeout = jiffies + msecs_to_jiffies(20);
+		do {
+			l = mbox_read_reg(MAILBOX_SYSCONFIG);
+			if (!(l & OMAP4_SOFTRESET))
+				break;
+		} while (!time_after(jiffies, timeout));
+
+		if (l & OMAP4_SOFTRESET) {
+			pr_err("Can't take mailbox out of reset\n");
+			return -ENODEV;
+		}
+	} else {
 		mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG);
 		timeout = jiffies + msecs_to_jiffies(20);
 		do {
@@ -108,9 +123,10 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
 		} while (!time_after(jiffies, timeout));
 
 		if (!(l & RESETDONE)) {
-		pr_err("Can't take mmu out of reset\n");
+			pr_err("Can't take mailbox out of reset\n");
 			return -ENODEV;
 		}
+	}
 
 	l = mbox_read_reg(MAILBOX_REVISION);
 	pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));