dmaengine: qcom_hidma: correct channel QOS register offset

A regression was found while testing QOS with different channels.
The QOS register offset is 0x700 rather than 0x300.
Signed-off-by: NSinan Kaya <okaya@codeaurora.org>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

drivers/dma/qcom/hidma_mgmt.c

@@ -28,7 +28,7 @@
 
 #include "hidma_mgmt.h"
 
-#define HIDMA_QOS_N_OFFSET		0x300
+#define HIDMA_QOS_N_OFFSET		0x700
 #define HIDMA_CFG_OFFSET		0x400
 #define HIDMA_MAX_BUS_REQ_LEN_OFFSET	0x41C
 #define HIDMA_MAX_XACTIONS_OFFSET	0x420