提交 756fe285 编写于 作者: L Linus Torvalds

Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
  VIDEO: cyberpro: pci_request_regions needs a persistent name
  ARM: dma-isa: request cascade channel after registering it
  ARM: footbridge: trim down old ISA rtc setup
  ARM: fix PAGE_KERNEL
  ARM: Fix wrong shared bit for CPU write buffer bug test
  ARM: 5857/1: ARM: dmabounce: fix build
  ARM: 5856/1: Fix bug of uart0 platfrom data for nuc900
  ARM: 5855/1: putc support for nuc900
  ARM: 5854/1: fix compiling error for NUC900
  ARM: 5849/1: ARMv7: fix Oprofile events count
  ARM: add missing include to nwflash.c
  ARM: Kill CONFIG_CPU_32
  ARM: Convert VFP/Crunch/XscaleCP thread_release() to exit_thread()
  ARM: 5853/1: ARM: Fix build break on ARM v6 and v7
......@@ -312,7 +312,7 @@ static inline void unmap_single(struct device *dev, dma_addr_t dma_addr,
* we need to ensure that the data will be coherent
* with user mappings.
*/
__cpuc_flush_kernel_dcache_area(ptr, size);
__cpuc_flush_dcache_area(ptr, size);
}
free_safe_buffer(dev->archdata.dmabounce, buf);
}
......
......@@ -187,7 +187,6 @@ CONFIG_MACH_ACS5K=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM922T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -186,7 +186,6 @@ CONFIG_MACH_ACS5K=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM922T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -227,7 +227,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -189,7 +189,6 @@ CONFIG_PXA25x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -233,7 +233,6 @@ CONFIG_MACH_OMAP3517EVM=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -210,7 +210,6 @@ CONFIG_OMAP_ARM_150MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -101,7 +101,6 @@ CONFIG_SA1100_ASSABET=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -181,7 +181,6 @@ CONFIG_AT91_TIMER_HZ=100
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -130,7 +130,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -129,7 +129,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -188,7 +188,6 @@ CONFIG_AT91_TIMER_HZ=100
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -181,7 +181,6 @@ CONFIG_AT91_TIMER_HZ=100
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -181,7 +181,6 @@ CONFIG_AT91_TIMER_HZ=100
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -187,7 +187,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -179,7 +179,6 @@ CONFIG_AT91_TIMER_HZ=100
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -132,7 +132,6 @@ CONFIG_MACH_ATEB9200=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -103,7 +103,6 @@ CONFIG_SA1100_BADGE4=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -181,7 +181,6 @@ CONFIG_BCM_ZRELADDR=0x8000
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v6=y
......
......@@ -196,7 +196,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -97,7 +97,6 @@ CONFIG_MACH_CARMEVA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -105,7 +105,6 @@ CONFIG_SA1100_CERF_FLASH_16MB=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -236,7 +236,6 @@ CONFIG_MACH_CM_T35=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -205,7 +205,6 @@ CONFIG_PXA_SSP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -247,7 +247,6 @@ CONFIG_PLAT_PXA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -204,7 +204,6 @@ CONFIG_PXA27x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -212,7 +212,6 @@ CONFIG_PXA3xx=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -125,7 +125,6 @@ CONFIG_SA1100_COLLIE=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -214,7 +214,6 @@ CONFIG_PXA_HAVE_BOARD_IRQS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -229,7 +229,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -219,7 +219,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -230,7 +230,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -193,7 +193,6 @@ CONFIG_AT91_TIMER_HZ=128
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -215,7 +215,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -225,7 +225,6 @@ CONFIG_DAVINCI_RESET_CLOCKS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -223,7 +223,6 @@ CONFIG_DAVINCI_RESET_CLOCKS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -186,7 +186,6 @@ CONFIG_PLAT_ORION=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v6=y
......
......@@ -83,7 +83,6 @@ CONFIG_ARCH_EBSA110=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA110=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -186,7 +186,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -90,7 +90,6 @@ CONFIG_ARCH_EP7211=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM720T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_LV4T=y
......
......@@ -202,7 +202,6 @@ CONFIG_PXA_SSP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -198,7 +198,6 @@ CONFIG_EP93XX_EARLY_UART1=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -203,7 +203,6 @@ CONFIG_PXA_HAVE_BOARD_IRQS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -240,7 +240,6 @@ CONFIG_PLAT_PXA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -95,7 +95,6 @@ CONFIG_ARCH_EBSA285=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA110=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -88,7 +88,6 @@ CONFIG_ARCH_FORTUNET=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM720T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_LV4T=y
......
......@@ -205,7 +205,6 @@ CONFIG_SA1100_H3600=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -206,7 +206,6 @@ CONFIG_PXA25x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -87,7 +87,6 @@ CONFIG_CPU_H7201=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM720T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_LV4T=y
......
......@@ -91,7 +91,6 @@ CONFIG_CPU_H7202=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM720T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_LV4T=y
......
......@@ -103,7 +103,6 @@ CONFIG_SA1100_HACKKIT=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -241,7 +241,6 @@ CONFIG_OMAP_ARM_195MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v4T=y
......
......@@ -238,7 +238,6 @@ CONFIG_MACH_IGEP0020=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -92,7 +92,6 @@ CONFIG_ARCH_INTEGRATOR_AP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM720T=y
CONFIG_CPU_ARM920T=y
# CONFIG_CPU_ARM922T is not set
......
......@@ -163,7 +163,6 @@ CONFIG_PLAT_IOP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -168,7 +168,6 @@ CONFIG_PLAT_IOP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -198,7 +198,6 @@ CONFIG_PLAT_IOP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -151,7 +151,6 @@ CONFIG_ARCH_IXDP2X01=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -145,7 +145,6 @@ CONFIG_MACH_ROADRUNNER=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -189,7 +189,6 @@ CONFIG_IXP4XX_NPE=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -202,7 +202,6 @@ CONFIG_SA1100_SSP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -132,7 +132,6 @@ CONFIG_MACH_KAFA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -230,7 +230,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -201,7 +201,6 @@ CONFIG_PLAT_ORION=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_FEROCEON=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_CPU_32v5=y
......
......@@ -186,7 +186,6 @@ CONFIG_MACH_DSM320=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM922T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -99,7 +99,6 @@ CONFIG_SA1100_LART=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -174,7 +174,6 @@ CONFIG_PLAT_ORION=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_FEROCEON=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_CPU_32v5=y
......
......@@ -143,7 +143,6 @@ CONFIG_PXA27x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -95,7 +95,6 @@ CONFIG_LPD7A40X_CPLD_SSP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM922T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -117,7 +117,6 @@ CONFIG_ARCH_LH7A404=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM922T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -92,7 +92,6 @@ CONFIG_PXA25x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -82,7 +82,6 @@ CONFIG_ARCH_L7200=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM720T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_LV4T=y
......
......@@ -204,7 +204,6 @@ CONFIG_PXA_HAVE_BOARD_IRQS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -93,7 +93,6 @@ CONFIG_IWMMXT=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -256,7 +256,6 @@ CONFIG_MACH_MINI2440=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -155,7 +155,6 @@ CONFIG_MSM_SMD=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -181,7 +181,6 @@ CONFIG_PLAT_ORION=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_FEROCEON=y
CONFIG_CPU_FEROCEON_OLD_ID=y
CONFIG_CPU_32v5=y
......
......@@ -190,7 +190,6 @@ CONFIG_MXC_IRQ_PRIOR=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -88,7 +88,6 @@ CONFIG_ARCH_MX1ADS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -185,7 +185,6 @@ CONFIG_MXC_PWM=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -207,7 +207,6 @@ CONFIG_MXC_PWM=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -173,7 +173,6 @@ CONFIG_MACH_MX31_3DS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -218,7 +218,6 @@ CONFIG_ARCH_MXC_IOMUX_V3=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -210,7 +210,6 @@ CONFIG_OMAP_ARM_216MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -232,7 +232,6 @@ CONFIG_MACH_NOKIA_N8X0=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -218,7 +218,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -103,7 +103,6 @@ CONFIG_ASSABET_NEPONSET=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -89,7 +89,6 @@ CONFIG_FOOTBRIDGE_HOST=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA110=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -122,7 +122,6 @@ CONFIG_MACH_NXEB500HMI=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -191,7 +191,6 @@ CONFIG_I2C_BITBANG_8815NHK=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -180,7 +180,6 @@ CONFIG_MACH_W90P910EVB=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -201,7 +201,6 @@ CONFIG_MACH_W90P950EVB=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -201,7 +201,6 @@ CONFIG_MACH_W90N960EVB=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -213,7 +213,6 @@ CONFIG_MACH_OMAP3_BEAGLE=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -245,7 +245,6 @@ CONFIG_MACH_OMAP_3630SDP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -220,7 +220,6 @@ CONFIG_MACH_OMAP3EVM=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -211,7 +211,6 @@ CONFIG_MACH_OMAP3_PANDORA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -246,7 +246,6 @@ CONFIG_MACH_OMAP3_TOUCHBOOK=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -197,7 +197,6 @@ CONFIG_MACH_OMAP_2430SDP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -232,7 +232,6 @@ CONFIG_MACH_OMAP_3430SDP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -236,7 +236,6 @@ CONFIG_MACH_OMAP_3630SDP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -220,7 +220,6 @@ CONFIG_MACH_OMAP_4430SDP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -196,7 +196,6 @@ CONFIG_MACH_OMAP_APOLLON=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -205,7 +205,6 @@ CONFIG_OMAP_ARM_168MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -207,7 +207,6 @@ CONFIG_OMAP_ARM_192MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -201,7 +201,6 @@ CONFIG_OMAP_ARM_192MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -191,7 +191,6 @@ CONFIG_ARCH_OMAP2420=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -231,7 +231,6 @@ CONFIG_OMAP_ARM_60MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -201,7 +201,6 @@ CONFIG_MACH_OMAP_H4=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
CONFIG_CPU_32v6=y
......
......@@ -205,7 +205,6 @@ CONFIG_OMAP_ARM_168MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -206,7 +206,6 @@ CONFIG_OMAP_ARM_192MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -214,7 +214,6 @@ CONFIG_MACH_OMAP_LDP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -212,7 +212,6 @@ CONFIG_OMAP_ARM_192MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -199,7 +199,6 @@ CONFIG_OMAP_ARM_182MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -222,7 +222,6 @@ CONFIG_MACH_OMAP_ZOOM2=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -236,7 +236,6 @@ CONFIG_MACH_OMAP_ZOOM3=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -161,7 +161,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -210,7 +210,6 @@ CONFIG_PLAT_ORION=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_FEROCEON=y
CONFIG_CPU_FEROCEON_OLD_ID=y
CONFIG_CPU_32v5=y
......
......@@ -217,7 +217,6 @@ CONFIG_MACH_OVERO=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -196,7 +196,6 @@ CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -176,7 +176,6 @@ CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -200,7 +200,6 @@ CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -209,7 +209,6 @@ CONFIG_PXA_PWM=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -168,7 +168,6 @@ CONFIG_PXA27x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -168,7 +168,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -100,7 +100,6 @@ CONFIG_SA1100_PLEB=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -121,7 +121,6 @@ CONFIG_ARCH_PNX4008=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -184,7 +184,6 @@ CONFIG_PLAT_PXA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_MOHAWK=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -92,7 +92,6 @@ CONFIG_PXA25x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -240,7 +240,6 @@ CONFIG_PLAT_PXA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSC3=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -184,7 +184,6 @@ CONFIG_PLAT_PXA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_MOHAWK=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -195,7 +195,6 @@ CONFIG_AT91_EARLY_USART0=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -186,7 +186,6 @@ CONFIG_REALVIEW_HIGH_PHYS_OFFSET=y
#
# Processor Type
#
CONFIG_CPU_32=y
# CONFIG_CPU_ARM926T is not set
CONFIG_CPU_V6=y
CONFIG_CPU_32v6K=y
......
......@@ -184,7 +184,6 @@ CONFIG_MACH_REALVIEW_PB1176=y
#
# Processor Type
#
CONFIG_CPU_32=y
# CONFIG_CPU_ARM926T is not set
CONFIG_CPU_V6=y
# CONFIG_CPU_32v6K is not set
......
......@@ -150,7 +150,6 @@ CONFIG_ARCH_ACORN=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM610=y
CONFIG_CPU_ARM710=y
CONFIG_CPU_SA110=y
......
......@@ -212,7 +212,6 @@ CONFIG_MACH_NOKIA_RX51=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -277,7 +277,6 @@ CONFIG_MACH_SMDK2443=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v4T=y
......
......@@ -192,7 +192,6 @@ CONFIG_SMDK6410_SD_CH0=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_V6=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v6=y
......
......@@ -202,7 +202,6 @@ CONFIG_MACH_SMDKC100=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -175,7 +175,6 @@ CONFIG_MTD_AT91_DATAFLASH_CARD=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -99,7 +99,6 @@ CONFIG_SA1100_SHANNON=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -173,7 +173,6 @@ CONFIG_ARCH_SHARK=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA110=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -101,7 +101,6 @@ CONFIG_SA1100_SIMPAD=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
......
......@@ -212,7 +212,6 @@ CONFIG_PXA_SSP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -193,7 +193,6 @@ CONFIG_MACH_STMP378X=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -182,7 +182,6 @@ CONFIG_MACH_STMP37XX=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -210,7 +210,6 @@ CONFIG_OMAP_ARM_168MHZ=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM925T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -215,7 +215,6 @@ CONFIG_MACH_TCT_HAMMER=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -156,7 +156,6 @@ CONFIG_PXA27x=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -207,7 +207,6 @@ CONFIG_MACH_U300_SPIDUMMY=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -201,7 +201,6 @@ CONFIG_MACH_U8500_MOP=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_V7=y
CONFIG_CPU_32v7=y
......
......@@ -195,7 +195,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -187,7 +187,6 @@ CONFIG_AT91_EARLY_DBGU=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -117,7 +117,6 @@ CONFIG_MACH_VERSATILE_AB=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM926T=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
......
......@@ -204,7 +204,6 @@ CONFIG_PXA_HAVE_ISA_IRQS=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -208,7 +208,6 @@ CONFIG_PLAT_PXA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -183,7 +183,6 @@ CONFIG_MACH_YL9200=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_ARM920T=y
CONFIG_CPU_32v4T=y
CONFIG_CPU_ABRT_EV4T=y
......
......@@ -271,7 +271,6 @@ CONFIG_PLAT_PXA=y
#
# Processor Type
#
CONFIG_CPU_32=y
CONFIG_CPU_XSCALE=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
......
......@@ -24,206 +24,228 @@
* CPU_NAME - the prefix for CPU related functions
*/
#ifdef CONFIG_CPU_32
# ifdef CONFIG_CPU_ARM610
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm6
# endif
#ifdef CONFIG_CPU_ARM610
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm6
# endif
# ifdef CONFIG_CPU_ARM7TDMI
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm7tdmi
# endif
#endif
#ifdef CONFIG_CPU_ARM7TDMI
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm7tdmi
# endif
# ifdef CONFIG_CPU_ARM710
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm7
# endif
#endif
#ifdef CONFIG_CPU_ARM710
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm7
# endif
# ifdef CONFIG_CPU_ARM720T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm720
# endif
#endif
#ifdef CONFIG_CPU_ARM720T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm720
# endif
# ifdef CONFIG_CPU_ARM740T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm740
# endif
#endif
#ifdef CONFIG_CPU_ARM740T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm740
# endif
# ifdef CONFIG_CPU_ARM9TDMI
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm9tdmi
# endif
#endif
#ifdef CONFIG_CPU_ARM9TDMI
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm9tdmi
# endif
# ifdef CONFIG_CPU_ARM920T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm920
# endif
#endif
#ifdef CONFIG_CPU_ARM920T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm920
# endif
# ifdef CONFIG_CPU_ARM922T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm922
# endif
#endif
#ifdef CONFIG_CPU_ARM922T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm922
# endif
# ifdef CONFIG_CPU_FA526
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_fa526
# endif
#endif
#ifdef CONFIG_CPU_FA526
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_fa526
# endif
# ifdef CONFIG_CPU_ARM925T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm925
# endif
#endif
#ifdef CONFIG_CPU_ARM925T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm925
# endif
# ifdef CONFIG_CPU_ARM926T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm926
# endif
#endif
#ifdef CONFIG_CPU_ARM926T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm926
# endif
# ifdef CONFIG_CPU_ARM940T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm940
# endif
#endif
#ifdef CONFIG_CPU_ARM940T
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm940
# endif
# ifdef CONFIG_CPU_ARM946E
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm946
# endif
#endif
#ifdef CONFIG_CPU_ARM946E
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm946
# endif
# ifdef CONFIG_CPU_SA110
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_sa110
# endif
#endif
#ifdef CONFIG_CPU_SA110
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_sa110
# endif
# ifdef CONFIG_CPU_SA1100
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_sa1100
# endif
#endif
#ifdef CONFIG_CPU_SA1100
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_sa1100
# endif
# ifdef CONFIG_CPU_ARM1020
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1020
# endif
#endif
#ifdef CONFIG_CPU_ARM1020
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1020
# endif
# ifdef CONFIG_CPU_ARM1020E
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1020e
# endif
#endif
#ifdef CONFIG_CPU_ARM1020E
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1020e
# endif
# ifdef CONFIG_CPU_ARM1022
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1022
# endif
#endif
#ifdef CONFIG_CPU_ARM1022
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1022
# endif
# ifdef CONFIG_CPU_ARM1026
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1026
# endif
#endif
#ifdef CONFIG_CPU_ARM1026
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_arm1026
# endif
# ifdef CONFIG_CPU_XSCALE
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_xscale
# endif
#endif
#ifdef CONFIG_CPU_XSCALE
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_xscale
# endif
# ifdef CONFIG_CPU_XSC3
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_xsc3
# endif
#endif
#ifdef CONFIG_CPU_XSC3
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_xsc3
# endif
# ifdef CONFIG_CPU_MOHAWK
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_mohawk
# endif
#endif
#ifdef CONFIG_CPU_MOHAWK
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_mohawk
# endif
# ifdef CONFIG_CPU_FEROCEON
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_feroceon
# endif
#endif
#ifdef CONFIG_CPU_FEROCEON
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_feroceon
# endif
# ifdef CONFIG_CPU_V6
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_v6
# endif
#endif
#ifdef CONFIG_CPU_V6
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_v6
# endif
# ifdef CONFIG_CPU_V7
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_v7
# endif
#endif
#ifdef CONFIG_CPU_V7
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_v7
# endif
#endif
......
......@@ -41,7 +41,7 @@ static inline void thread_notify(unsigned long rc, struct thread_info *thread)
* These are the reason codes for the thread notifier.
*/
#define THREAD_NOTIFY_FLUSH 0
#define THREAD_NOTIFY_RELEASE 1
#define THREAD_NOTIFY_EXIT 1
#define THREAD_NOTIFY_SWITCH 2
#endif
......
......@@ -51,7 +51,7 @@ static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t)
* initialised state information on the first fault.
*/
case THREAD_NOTIFY_RELEASE:
case THREAD_NOTIFY_EXIT:
crunch_task_release(thread);
break;
......
......@@ -207,8 +207,6 @@ void __init isa_init_dma(void)
outb(0x32, 0x4d6);
outb(0x33, 0x4d6);
request_dma(DMA_ISA_CASCADE, "cascade");
for (i = 0; i < ARRAY_SIZE(dma_resources); i++)
request_resource(&ioport_resource, dma_resources + i);
......@@ -218,5 +216,7 @@ void __init isa_init_dma(void)
printk(KERN_ERR "ISADMA%u: unable to register: %d\n",
chan, ret);
}
request_dma(DMA_ISA_CASCADE, "cascade");
}
}
......@@ -274,17 +274,18 @@ void show_regs(struct pt_regs * regs)
__backtrace();
}
ATOMIC_NOTIFIER_HEAD(thread_notify_head);
EXPORT_SYMBOL_GPL(thread_notify_head);
/*
* Free current thread data structures etc..
*/
void exit_thread(void)
{
thread_notify(THREAD_NOTIFY_EXIT, current_thread_info());
}
ATOMIC_NOTIFIER_HEAD(thread_notify_head);
EXPORT_SYMBOL_GPL(thread_notify_head);
void flush_thread(void)
{
struct thread_info *thread = current_thread_info();
......@@ -299,9 +300,6 @@ void flush_thread(void)
void release_thread(struct task_struct *dead_task)
{
struct thread_info *thread = task_thread_info(dead_task);
thread_notify(THREAD_NOTIFY_RELEASE, thread);
}
asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
......
......@@ -70,7 +70,7 @@ static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
* initialised state information on the first fault.
*/
case THREAD_NOTIFY_RELEASE:
case THREAD_NOTIFY_EXIT:
iwmmxt_task_release(thread);
break;
......
......@@ -4,7 +4,7 @@
# Object file lists.
obj-y := common.o dc21285.o dma.o isa-irq.o time.o
obj-y := common.o dc21285.o dma.o isa-irq.o
obj-m :=
obj-n :=
obj- :=
......@@ -25,4 +25,4 @@ obj-$(CONFIG_ARCH_PERSONAL_SERVER) += personal.o dc21285-timer.o
obj-$(CONFIG_PCI) +=$(pci-y)
obj-$(CONFIG_LEDS) +=$(leds-y)
obj-$(CONFIG_ISA) += isa.o
obj-$(CONFIG_ISA) += isa.o isa-rtc.o
......@@ -56,8 +56,6 @@ static void __init footbridge_timer_init(void)
*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
isa_rtc_init();
}
struct sys_timer footbridge_timer = {
......
/*
* arch/arm/mach-footbridge/isa-rtc.c
*
* Copyright (C) 1998 Russell King.
* Copyright (C) 1998 Phil Blundell
*
* CATS has a real-time clock, though the evaluation board doesn't.
*
* Changelog:
* 21-Mar-1998 RMK Created
* 27-Aug-1998 PJB CATS support
* 28-Dec-1998 APH Made leds optional
* 20-Jan-1999 RMK Started merge of EBSA285, CATS and NetWinder
* 16-Mar-1999 RMK More support for EBSA285-like machines with RTCs in
*/
#define RTC_PORT(x) (0x70+(x))
#define RTC_ALWAYS_BCD 0
#include <linux/init.h>
#include <linux/mc146818rtc.h>
#include <linux/bcd.h>
#include <linux/io.h>
#include "common.h"
void __init isa_rtc_init(void)
{
int reg_d, reg_b;
/*
* Probe for the RTC.
*/
reg_d = CMOS_READ(RTC_REG_D);
/*
* make sure the divider is set
*/
CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A);
/*
* Set control reg B
* (24 hour mode, update enabled)
*/
reg_b = CMOS_READ(RTC_REG_B) & 0x7f;
reg_b |= 2;
CMOS_WRITE(reg_b, RTC_REG_B);
if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ &&
CMOS_READ(RTC_REG_B) == reg_b) {
/*
* We have a RTC. Check the battery
*/
if ((reg_d & 0x80) == 0)
printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n");
}
}
......@@ -76,8 +76,6 @@ static struct irqaction isa_timer_irq = {
static void __init isa_timer_init(void)
{
isa_rtc_init();
/* enable PIT timer */
/* set for periodic (4) and LSB/MSB write (0x30) */
outb(0x34, 0x43);
......
......@@ -11,6 +11,9 @@
#include <linux/serial_8250.h>
#include <asm/irq.h>
#include <asm/hardware/dec21285.h>
#include "common.h"
static struct resource rtc_resources[] = {
[0] = {
......@@ -77,11 +80,18 @@ static struct platform_device serial_device = {
static int __init footbridge_isa_init(void)
{
int err;
int err = 0;
err = platform_device_register(&rtc_device);
if (err)
printk(KERN_ERR "Unable to register RTC device: %d\n", err);
if (!footbridge_cfn_mode())
return 0;
/* Personal server doesn't have RTC */
if (!machine_is_personal_server()) {
isa_rtc_init();
err = platform_device_register(&rtc_device);
if (err)
printk(KERN_ERR "Unable to register RTC device: %d\n", err);
}
err = platform_device_register(&serial_device);
if (err)
printk(KERN_ERR "Unable to register serial device: %d\n", err);
......
/*
* arch/arm/mach-footbridge/include/mach/time.h
*
* Copyright (C) 1998 Russell King.
* Copyright (C) 1998 Phil Blundell
*
* CATS has a real-time clock, though the evaluation board doesn't.
*
* Changelog:
* 21-Mar-1998 RMK Created
* 27-Aug-1998 PJB CATS support
* 28-Dec-1998 APH Made leds optional
* 20-Jan-1999 RMK Started merge of EBSA285, CATS and NetWinder
* 16-Mar-1999 RMK More support for EBSA285-like machines with RTCs in
*/
#define RTC_PORT(x) (rtc_base+(x))
#define RTC_ALWAYS_BCD 0
#include <linux/timex.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mc146818rtc.h>
#include <linux/bcd.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach/time.h>
#include "common.h"
static int rtc_base;
static unsigned long __init get_isa_cmos_time(void)
{
unsigned int year, mon, day, hour, min, sec;
// check to see if the RTC makes sense.....
if ((CMOS_READ(RTC_VALID) & RTC_VRT) == 0)
return mktime(1970, 1, 1, 0, 0, 0);
do {
sec = CMOS_READ(RTC_SECONDS);
min = CMOS_READ(RTC_MINUTES);
hour = CMOS_READ(RTC_HOURS);
day = CMOS_READ(RTC_DAY_OF_MONTH);
mon = CMOS_READ(RTC_MONTH);
year = CMOS_READ(RTC_YEAR);
} while (sec != CMOS_READ(RTC_SECONDS));
if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
sec = bcd2bin(sec);
min = bcd2bin(min);
hour = bcd2bin(hour);
day = bcd2bin(day);
mon = bcd2bin(mon);
year = bcd2bin(year);
}
if ((year += 1900) < 1970)
year += 100;
return mktime(year, mon, day, hour, min, sec);
}
static int set_isa_cmos_time(void)
{
int retval = 0;
int real_seconds, real_minutes, cmos_minutes;
unsigned char save_control, save_freq_select;
unsigned long nowtime = xtime.tv_sec;
save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
cmos_minutes = CMOS_READ(RTC_MINUTES);
if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
cmos_minutes = bcd2bin(cmos_minutes);
/*
* since we're only adjusting minutes and seconds,
* don't interfere with hour overflow. This avoids
* messing with unknown time zones but requires your
* RTC not to be off by more than 15 minutes
*/
real_seconds = nowtime % 60;
real_minutes = nowtime / 60;
if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
real_minutes += 30; /* correct for half hour time zone */
real_minutes %= 60;
if (abs(real_minutes - cmos_minutes) < 30) {
if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
real_seconds = bin2bcd(real_seconds);
real_minutes = bin2bcd(real_minutes);
}
CMOS_WRITE(real_seconds,RTC_SECONDS);
CMOS_WRITE(real_minutes,RTC_MINUTES);
} else
retval = -1;
/* The following flags have to be released exactly in this order,
* otherwise the DS12887 (popular MC146818A clone with integrated
* battery and quartz) will not reset the oscillator and will not
* update precisely 500 ms later. You won't find this mentioned in
* the Dallas Semiconductor data sheets, but who believes data
* sheets anyway ... -- Markus Kuhn
*/
CMOS_WRITE(save_control, RTC_CONTROL);
CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
return retval;
}
void __init isa_rtc_init(void)
{
if (machine_is_personal_server())
/*
* Add-in 21285s shouldn't access the RTC
*/
rtc_base = 0;
else
rtc_base = 0x70;
if (rtc_base) {
int reg_d, reg_b;
/*
* Probe for the RTC.
*/
reg_d = CMOS_READ(RTC_REG_D);
/*
* make sure the divider is set
*/
CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A);
/*
* Set control reg B
* (24 hour mode, update enabled)
*/
reg_b = CMOS_READ(RTC_REG_B) & 0x7f;
reg_b |= 2;
CMOS_WRITE(reg_b, RTC_REG_B);
if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ &&
CMOS_READ(RTC_REG_B) == reg_b) {
struct timespec tv;
/*
* We have a RTC. Check the battery
*/
if ((reg_d & 0x80) == 0)
printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n");
tv.tv_nsec = 0;
tv.tv_sec = get_isa_cmos_time();
do_settimeofday(&tv);
set_rtc = set_isa_cmos_time;
} else
rtc_base = 0;
}
}
......@@ -96,6 +96,7 @@ static struct clk_lookup nuc900_clkregs[] = {
struct plat_serial8250_port nuc900_uart_data[] = {
NUC900_8250PORT(UART0),
{},
};
struct platform_device nuc900_serial_device = {
......
......@@ -197,7 +197,7 @@ static struct platform_device nuc900_device_emc = {
/* SPI device */
static struct w90p910_spi_info nuc900_spiflash_data = {
static struct nuc900_spi_info nuc900_spiflash_data = {
.num_cs = 1,
.lsb = 0,
.txneg = 1,
......
......@@ -22,11 +22,21 @@
#include <mach/regs-serial.h>
#include <mach/map.h>
#include <linux/serial_reg.h>
#define arch_decomp_wdog()
#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
static volatile u32 * uart_base = (u32 *)UART0_PA;
static void putc(int ch)
{
/* Check THRE and TEMT bits before we transmit the character.
*/
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
barrier();
*uart_base = ch;
}
static inline void flush(void)
......
comment "Processor Type"
config CPU_32
bool
default y
# Select CPU types depending on the architecture selected. This selects
# which CPUs we support in the kernel image, and the compiler instruction
# optimiser behaviour.
......
......@@ -48,7 +48,7 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to,
*/
if (page_address(to) != NULL)
#endif
__cpuc_flush_dcache_page(kto);
__cpuc_flush_dcache_area(kto, PAGE_SIZE);
kunmap_atomic(kto, KM_USER1);
kunmap_atomic(kfrom, KM_USER0);
}
......
......@@ -207,9 +207,8 @@ void __init check_writebuffer_bugs(void)
page = alloc_page(GFP_KERNEL);
if (page) {
unsigned long *p1, *p2;
pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG|
L_PTE_DIRTY|L_PTE_WRITE|
L_PTE_MT_BUFFERABLE);
pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
p1 = vmap(&page, 1, VM_IOREMAP, prot);
p2 = vmap(&page, 1, VM_IOREMAP, prot);
......
......@@ -453,8 +453,7 @@ static void __init build_mem_type_table(void)
pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
L_PTE_DIRTY | L_PTE_WRITE |
L_PTE_EXEC | kern_pgprot);
L_PTE_DIRTY | L_PTE_WRITE | kern_pgprot);
mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
......
......@@ -6,7 +6,7 @@ obj-$(CONFIG_FPE_NWFPE) += nwfpe.o
nwfpe-y += fpa11.o fpa11_cpdo.o fpa11_cpdt.o \
fpa11_cprt.o fpmodule.o fpopcode.o \
softfloat.o single_cpdo.o double_cpdo.o
softfloat.o single_cpdo.o double_cpdo.o \
entry.o
nwfpe-$(CONFIG_FPE_NWFPE_XP) += extended_cpdo.o
nwfpe-$(CONFIG_CPU_32) += entry.o
......@@ -191,12 +191,8 @@ int armv7_setup_pmnc(void)
return -EBUSY;
}
/*
* Initialize & Reset PMNC: C bit, D bit and P bit.
* Note: Using a slower count for CCNT (D bit: divide by 64) results
* in a more stable system
*/
armv7_pmnc_write(PMNC_P | PMNC_C | PMNC_D);
/* Initialize & Reset PMNC: C bit and P bit */
armv7_pmnc_write(PMNC_P | PMNC_C);
for (cnt = CCNT; cnt < CNTMAX; cnt++) {
......
......@@ -63,14 +63,15 @@ static void vfp_thread_flush(struct thread_info *thread)
put_cpu();
}
static void vfp_thread_release(struct thread_info *thread)
static void vfp_thread_exit(struct thread_info *thread)
{
/* release case: Per-thread VFP cleanup. */
union vfp_state *vfp = &thread->vfpstate;
unsigned int cpu = thread->cpu;
unsigned int cpu = get_cpu();
if (last_VFP_context[cpu] == vfp)
last_VFP_context[cpu] = NULL;
put_cpu();
}
/*
......@@ -88,11 +89,13 @@ static void vfp_thread_release(struct thread_info *thread)
* but may change at any time.
* - we could be preempted if tree preempt rcu is enabled, so
* it is unsafe to use thread->cpu.
* THREAD_NOTIFY_RELEASE:
* - the thread (v) will not be running on any CPU; it is a dead thread.
* - thread->cpu will be the last CPU the thread ran on, which may not
* be the current CPU.
* - we could be preempted if tree preempt rcu is enabled.
* THREAD_NOTIFY_EXIT
* - the thread (v) will be running on the local CPU, so
* v === current_thread_info()
* - thread->cpu is the local CPU number at the time it is accessed,
* but may change at any time.
* - we could be preempted if tree preempt rcu is enabled, so
* it is unsafe to use thread->cpu.
*/
static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
{
......@@ -133,7 +136,7 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
if (cmd == THREAD_NOTIFY_FLUSH)
vfp_thread_flush(thread);
else
vfp_thread_release(thread);
vfp_thread_exit(thread);
return NOTIFY_DONE;
}
......
......@@ -27,6 +27,7 @@
#include <linux/init.h>
#include <linux/smp_lock.h>
#include <linux/mutex.h>
#include <linux/jiffies.h>
#include <asm/hardware/dec21285.h>
#include <asm/io.h>
......
......@@ -1573,15 +1573,15 @@ cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
if (err)
return err;
err = pci_request_regions(dev, name);
if (err)
return err;
err = -ENOMEM;
cfb = cyberpro_alloc_fb_info(id->driver_data, name);
if (!cfb)
goto failed_release;
err = pci_request_regions(dev, cfb->fb.fix.id);
if (err)
goto failed_regions;
cfb->dev = dev;
cfb->region = pci_ioremap_bar(dev, 0);
if (!cfb->region)
......@@ -1633,10 +1633,10 @@ cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
failed:
iounmap(cfb->region);
failed_ioremap:
pci_release_regions(dev);
failed_regions:
cyberpro_free_fb_info(cfb);
failed_release:
pci_release_regions(dev);
return err;
}
......
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