diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl0046.h b/drivers/gpu/drm/nouveau/include/nvif/cl0046.h new file mode 100644 index 0000000000000000000000000000000000000000..a6a71f4ad91eb097091f137b11367b8724dc5505 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl0046.h @@ -0,0 +1,28 @@ +#ifndef __NVIF_CL0046_H__ +#define __NVIF_CL0046_H__ + +#define NV04_DISP_NTFY_VBLANK 0x00 +#define NV04_DISP_NTFY_CONN 0x01 + +struct nv04_disp_mthd_v0 { + __u8 version; +#define NV04_DISP_SCANOUTPOS 0x00 + __u8 method; + __u8 head; + __u8 pad03[5]; +}; + +struct nv04_disp_scanoutpos_v0 { + __u8 version; + __u8 pad01[7]; + __s64 time[2]; + __u16 vblanks; + __u16 vblanke; + __u16 vtotal; + __u16 vline; + __u16 hblanks; + __u16 hblanke; + __u16 htotal; + __u16 hline; +}; +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl5070.h b/drivers/gpu/drm/nouveau/include/nvif/cl5070.h new file mode 100644 index 0000000000000000000000000000000000000000..d15c296b5f3352f0cdfaf1165e36a13273b1801a --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl5070.h @@ -0,0 +1,99 @@ +#ifndef __NVIF_CL5070_H__ +#define __NVIF_CL5070_H__ + +#define NV50_DISP_MTHD 0x00 + +struct nv50_disp_mthd_v0 { + __u8 version; +#define NV50_DISP_SCANOUTPOS 0x00 + __u8 method; + __u8 head; + __u8 pad03[5]; +}; + +struct nv50_disp_scanoutpos_v0 { + __u8 version; + __u8 pad01[7]; + __s64 time[2]; + __u16 vblanks; + __u16 vblanke; + __u16 vtotal; + __u16 vline; + __u16 hblanks; + __u16 hblanke; + __u16 htotal; + __u16 hline; +}; + +struct nv50_disp_mthd_v1 { + __u8 version; +#define NV50_DISP_MTHD_V1_DAC_PWR 0x10 +#define NV50_DISP_MTHD_V1_DAC_LOAD 0x11 +#define NV50_DISP_MTHD_V1_SOR_PWR 0x20 +#define NV50_DISP_MTHD_V1_SOR_HDA_ELD 0x21 +#define NV50_DISP_MTHD_V1_SOR_HDMI_PWR 0x22 +#define NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT 0x23 +#define NV50_DISP_MTHD_V1_SOR_DP_PWR 0x24 +#define NV50_DISP_MTHD_V1_PIOR_PWR 0x30 + __u8 method; + __u16 hasht; + __u16 hashm; + __u8 pad06[2]; +}; + +struct nv50_disp_dac_pwr_v0 { + __u8 version; + __u8 state; + __u8 data; + __u8 vsync; + __u8 hsync; + __u8 pad05[3]; +}; + +struct nv50_disp_dac_load_v0 { + __u8 version; + __u8 load; + __u8 pad02[2]; + __u32 data; +}; + +struct nv50_disp_sor_pwr_v0 { + __u8 version; + __u8 state; + __u8 pad02[6]; +}; + +struct nv50_disp_sor_hda_eld_v0 { + __u8 version; + __u8 pad01[7]; + __u8 data[]; +}; + +struct nv50_disp_sor_hdmi_pwr_v0 { + __u8 version; + __u8 state; + __u8 max_ac_packet; + __u8 rekey; + __u8 pad04[4]; +}; + +struct nv50_disp_sor_lvds_script_v0 { + __u8 version; + __u8 pad01[1]; + __u16 script; + __u8 pad04[4]; +}; + +struct nv50_disp_sor_dp_pwr_v0 { + __u8 version; + __u8 state; + __u8 pad02[6]; +}; + +struct nv50_disp_pior_pwr_v0 { + __u8 version; + __u8 state; + __u8 type; + __u8 pad03[5]; +}; +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl507a.h b/drivers/gpu/drm/nouveau/include/nvif/cl507a.h new file mode 100644 index 0000000000000000000000000000000000000000..12e0643b78bda9192e403189cb40abf4298df761 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl507a.h @@ -0,0 +1,11 @@ +#ifndef __NVIF_CL507A_H__ +#define __NVIF_CL507A_H__ + +struct nv50_disp_cursor_v0 { + __u8 version; + __u8 head; + __u8 pad02[6]; +}; + +#define NV50_DISP_CURSOR_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl507b.h b/drivers/gpu/drm/nouveau/include/nvif/cl507b.h new file mode 100644 index 0000000000000000000000000000000000000000..99e9d8c47f60122c954a3a9645a76467b54f978f --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl507b.h @@ -0,0 +1,11 @@ +#ifndef __NVIF_CL507B_H__ +#define __NVIF_CL507B_H__ + +struct nv50_disp_overlay_v0 { + __u8 version; + __u8 head; + __u8 pad02[6]; +}; + +#define NV50_DISP_OVERLAY_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl507c.h b/drivers/gpu/drm/nouveau/include/nvif/cl507c.h new file mode 100644 index 0000000000000000000000000000000000000000..6af70dbdfd9f7733f177bd3ad353d633751013b1 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl507c.h @@ -0,0 +1,12 @@ +#ifndef __NVIF_CL507C_H__ +#define __NVIF_CL507C_H__ + +struct nv50_disp_base_channel_dma_v0 { + __u8 version; + __u8 head; + __u8 pad02[6]; + __u64 pushbuf; +}; + +#define NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl507d.h b/drivers/gpu/drm/nouveau/include/nvif/cl507d.h new file mode 100644 index 0000000000000000000000000000000000000000..5ab0c9e4c6a3e5ca64371ae82a262db5d0fb8b0c --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl507d.h @@ -0,0 +1,11 @@ +#ifndef __NVIF_CL507D_H__ +#define __NVIF_CL507D_H__ + +struct nv50_disp_core_channel_dma_v0 { + __u8 version; + __u8 pad01[7]; + __u64 pushbuf; +}; + +#define NV50_DISP_CORE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl507e.h b/drivers/gpu/drm/nouveau/include/nvif/cl507e.h new file mode 100644 index 0000000000000000000000000000000000000000..c06209f3cac4a8d4002bdee80a6a8c8890058fcb --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl507e.h @@ -0,0 +1,12 @@ +#ifndef __NVIF_CL507E_H__ +#define __NVIF_CL507E_H__ + +struct nv50_disp_overlay_channel_dma_v0 { + __u8 version; + __u8 head; + __u8 pad02[6]; + __u64 pushbuf; +}; + +#define NV50_DISP_OVERLAY_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index 65b7e4546731defa91a2503837310a579572a130..aa1e0634a28b26df85676198fb3b552c94e00ce3 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -24,7 +24,7 @@ #define KEPLER_INLINE_TO_MEMORY_A 0x0000a040 #define KEPLER_INLINE_TO_MEMORY_B 0x0000a140 -#define NV04_DISP 0x00000046 +#define NV04_DISP /* cl0046.h */ 0x00000046 #define NV03_CHANNEL_DMA 0x0000006b #define NV10_CHANNEL_DMA 0x0000006e @@ -39,59 +39,59 @@ #define KEPLER_CHANNEL_GPFIFO_A 0x0000a06f #define MAXWELL_CHANNEL_GPFIFO_A 0x0000b06f -#define NV50_DISP 0x00005070 -#define G82_DISP 0x00008270 -#define GT200_DISP 0x00008370 -#define GT214_DISP 0x00008570 -#define GT206_DISP 0x00008870 -#define GF110_DISP 0x00009070 -#define GK104_DISP 0x00009170 -#define GK110_DISP 0x00009270 -#define GM107_DISP 0x00009470 -#define GM204_DISP 0x00009570 +#define NV50_DISP /* cl5070.h */ 0x00005070 +#define G82_DISP /* cl5070.h */ 0x00008270 +#define GT200_DISP /* cl5070.h */ 0x00008370 +#define GT214_DISP /* cl5070.h */ 0x00008570 +#define GT206_DISP /* cl5070.h */ 0x00008870 +#define GF110_DISP /* cl5070.h */ 0x00009070 +#define GK104_DISP /* cl5070.h */ 0x00009170 +#define GK110_DISP /* cl5070.h */ 0x00009270 +#define GM107_DISP /* cl5070.h */ 0x00009470 +#define GM204_DISP /* cl5070.h */ 0x00009570 #define NV31_MPEG 0x00003174 #define G82_MPEG 0x00008274 #define NV74_VP2 0x00007476 -#define NV50_DISP_CURSOR 0x0000507a -#define G82_DISP_CURSOR 0x0000827a -#define GT214_DISP_CURSOR 0x0000857a -#define GF110_DISP_CURSOR 0x0000907a -#define GK104_DISP_CURSOR 0x0000917a - -#define NV50_DISP_OVERLAY 0x0000507b -#define G82_DISP_OVERLAY 0x0000827b -#define GT214_DISP_OVERLAY 0x0000857b -#define GF110_DISP_OVERLAY 0x0000907b -#define GK104_DISP_OVERLAY 0x0000917b - -#define NV50_DISP_BASE_CHANNEL_DMA 0x0000507c -#define G82_DISP_BASE_CHANNEL_DMA 0x0000827c -#define GT200_DISP_BASE_CHANNEL_DMA 0x0000837c -#define GT214_DISP_BASE_CHANNEL_DMA 0x0000857c -#define GF110_DISP_BASE_CHANNEL_DMA 0x0000907c -#define GK104_DISP_BASE_CHANNEL_DMA 0x0000917c -#define GK110_DISP_BASE_CHANNEL_DMA 0x0000927c - -#define NV50_DISP_CORE_CHANNEL_DMA 0x0000507d -#define G82_DISP_CORE_CHANNEL_DMA 0x0000827d -#define GT200_DISP_CORE_CHANNEL_DMA 0x0000837d -#define GT214_DISP_CORE_CHANNEL_DMA 0x0000857d -#define GT206_DISP_CORE_CHANNEL_DMA 0x0000887d -#define GF110_DISP_CORE_CHANNEL_DMA 0x0000907d -#define GK104_DISP_CORE_CHANNEL_DMA 0x0000917d -#define GK110_DISP_CORE_CHANNEL_DMA 0x0000927d -#define GM107_DISP_CORE_CHANNEL_DMA 0x0000947d -#define GM204_DISP_CORE_CHANNEL_DMA 0x0000957d - -#define NV50_DISP_OVERLAY_CHANNEL_DMA 0x0000507e -#define G82_DISP_OVERLAY_CHANNEL_DMA 0x0000827e -#define GT200_DISP_OVERLAY_CHANNEL_DMA 0x0000837e -#define GT214_DISP_OVERLAY_CHANNEL_DMA 0x0000857e -#define GF110_DISP_OVERLAY_CONTROL_DMA 0x0000907e -#define GK104_DISP_OVERLAY_CONTROL_DMA 0x0000917e +#define NV50_DISP_CURSOR /* cl507a.h */ 0x0000507a +#define G82_DISP_CURSOR /* cl507a.h */ 0x0000827a +#define GT214_DISP_CURSOR /* cl507a.h */ 0x0000857a +#define GF110_DISP_CURSOR /* cl507a.h */ 0x0000907a +#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a + +#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b +#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b +#define GT214_DISP_OVERLAY /* cl507b.h */ 0x0000857b +#define GF110_DISP_OVERLAY /* cl507b.h */ 0x0000907b +#define GK104_DISP_OVERLAY /* cl507b.h */ 0x0000917b + +#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c +#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c +#define GT200_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000837c +#define GT214_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000857c +#define GF110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000907c +#define GK104_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000917c +#define GK110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000927c + +#define NV50_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000507d +#define G82_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000827d +#define GT200_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000837d +#define GT214_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000857d +#define GT206_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000887d +#define GF110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000907d +#define GK104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000917d +#define GK110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000927d +#define GM107_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000947d +#define GM204_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000957d + +#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e +#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e +#define GT200_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000837e +#define GT214_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000857e +#define GF110_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000907e +#define GK104_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000917e #define FERMI_A /* cl9097.h */ 0x00009097 #define FERMI_B /* cl9097.h */ 0x00009197 @@ -452,166 +452,4 @@ struct kepler_channel_gpfifo_a_v0 { __u64 ioffset; __u64 vm; }; - -/******************************************************************************* - * legacy display - ******************************************************************************/ - -#define NV04_DISP_NTFY_VBLANK 0x00 -#define NV04_DISP_NTFY_CONN 0x01 - -struct nv04_disp_mthd_v0 { - __u8 version; -#define NV04_DISP_SCANOUTPOS 0x00 - __u8 method; - __u8 head; - __u8 pad03[5]; -}; - -struct nv04_disp_scanoutpos_v0 { - __u8 version; - __u8 pad01[7]; - __s64 time[2]; - __u16 vblanks; - __u16 vblanke; - __u16 vtotal; - __u16 vline; - __u16 hblanks; - __u16 hblanke; - __u16 htotal; - __u16 hline; -}; - -/******************************************************************************* - * display - ******************************************************************************/ - -#define NV50_DISP_MTHD 0x00 - -struct nv50_disp_mthd_v0 { - __u8 version; -#define NV50_DISP_SCANOUTPOS 0x00 - __u8 method; - __u8 head; - __u8 pad03[5]; -}; - -struct nv50_disp_mthd_v1 { - __u8 version; -#define NV50_DISP_MTHD_V1_DAC_PWR 0x10 -#define NV50_DISP_MTHD_V1_DAC_LOAD 0x11 -#define NV50_DISP_MTHD_V1_SOR_PWR 0x20 -#define NV50_DISP_MTHD_V1_SOR_HDA_ELD 0x21 -#define NV50_DISP_MTHD_V1_SOR_HDMI_PWR 0x22 -#define NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT 0x23 -#define NV50_DISP_MTHD_V1_SOR_DP_PWR 0x24 -#define NV50_DISP_MTHD_V1_PIOR_PWR 0x30 - __u8 method; - __u16 hasht; - __u16 hashm; - __u8 pad06[2]; -}; - -struct nv50_disp_dac_pwr_v0 { - __u8 version; - __u8 state; - __u8 data; - __u8 vsync; - __u8 hsync; - __u8 pad05[3]; -}; - -struct nv50_disp_dac_load_v0 { - __u8 version; - __u8 load; - __u8 pad02[2]; - __u32 data; -}; - -struct nv50_disp_sor_pwr_v0 { - __u8 version; - __u8 state; - __u8 pad02[6]; -}; - -struct nv50_disp_sor_hda_eld_v0 { - __u8 version; - __u8 pad01[7]; - __u8 data[]; -}; - -struct nv50_disp_sor_hdmi_pwr_v0 { - __u8 version; - __u8 state; - __u8 max_ac_packet; - __u8 rekey; - __u8 pad04[4]; -}; - -struct nv50_disp_sor_lvds_script_v0 { - __u8 version; - __u8 pad01[1]; - __u16 script; - __u8 pad04[4]; -}; - -struct nv50_disp_sor_dp_pwr_v0 { - __u8 version; - __u8 state; - __u8 pad02[6]; -}; - -struct nv50_disp_pior_pwr_v0 { - __u8 version; - __u8 state; - __u8 type; - __u8 pad03[5]; -}; - -/* core */ -struct nv50_disp_core_channel_dma_v0 { - __u8 version; - __u8 pad01[7]; - __u64 pushbuf; -}; - -#define NV50_DISP_CORE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 - -/* cursor immediate */ -struct nv50_disp_cursor_v0 { - __u8 version; - __u8 head; - __u8 pad02[6]; -}; - -#define NV50_DISP_CURSOR_V0_NTFY_UEVENT 0x00 - -/* base */ -struct nv50_disp_base_channel_dma_v0 { - __u8 version; - __u8 head; - __u8 pad02[6]; - __u64 pushbuf; -}; - -#define NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 - -/* overlay */ -struct nv50_disp_overlay_channel_dma_v0 { - __u8 version; - __u8 head; - __u8 pad02[6]; - __u64 pushbuf; -}; - -#define NV50_DISP_OVERLAY_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 - -/* overlay immediate */ -struct nv50_disp_overlay_v0 { - __u8 version; - __u8 head; - __u8 pad02[6]; -}; - -#define NV50_DISP_OVERLAY_V0_NTFY_UEVENT 0x00 #endif diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 8d00d006fcde5e64868bb64f765e8ff4f35d194c..40612e7cea4d1c924036127766ed73c7a57a3227 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -42,6 +42,7 @@ #include "nouveau_encoder.h" #include "nouveau_crtc.h" +#include #include MODULE_PARM_DESC(tv_disable, "Disable TV-out detection"); diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 18676b8c1721567878719d665931b22745ca8edd..24be27d3cd18cfb35821b00fe9531c5d0337c284 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c @@ -39,6 +39,7 @@ #include "nouveau_fence.h" +#include #include static int diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index 74247e1cb58ddb609b16ba3b654d40aab614af10..a934a7e467cb3182b8963349f2b3a76544d2e9a6 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -31,6 +31,12 @@ #include #include +#include +#include +#include +#include +#include +#include #include "nouveau_drm.h" #include "nouveau_dma.h" diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c index 44b67719f64d7957e6328d38ba2d62a0f222d611..9ac1638ae0cea70a4633aab986ef27db03ba674c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c @@ -32,6 +32,7 @@ #include #include +#include #include #include diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c index 1fd89edefc267ff234ac0df8883c448bc1198af4..23e3d43e50a0e765fad4cb741a6e4738bd5dad58 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basenv50.c @@ -27,6 +27,7 @@ #include #include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c index 01803c0679b682904672748b985f2e1bd02bb0b8..41d0ad2646a41212ad27483703c374e5ee600f31 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c index db4a9b3e0e09ef60555b80abde3e15ad7e7f5a6c..6901b712da3fb719b516591c5ffe80e590dff043 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/corenv50.c @@ -28,6 +28,7 @@ #include #include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c index 225858e62cf655852d109cfef348a02f6233e167..3e9d27ea41a2ad8e80f6bd0ca78979f5ee6c2e6a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c @@ -27,6 +27,7 @@ #include #include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c index 9bfa9e7dc161566fff94b79c902f479c2b38e1e5..4a3e0f113ea0066dc2813fe093c4042a257786e2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dacnv50.c @@ -27,7 +27,7 @@ #include #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c index af99efbd63f72aed0bca7ea13af33d51aee7a326..ae7343dda04ec49dfb581e88975457e4738591a0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c @@ -29,7 +29,7 @@ #include #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c index c1590b746f1344ec006da005f1719042bf28a07a..e6390e974061f030fd41db4af313d91094caa7f3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c @@ -27,7 +27,7 @@ #include #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c index ee9e800a8f06c8e9f8a47fd8487a98a1ae007e82..3eca62a299096e11e1bff655083bfbc8cbb03221 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmig84.c @@ -25,7 +25,7 @@ #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c index b5af025d3b047c7a68948b3bd2dd5604c7cb95da..62ca1feaff666be43ab0480570f0eafe2af72c0c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigf119.c @@ -25,7 +25,7 @@ #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c index 110dc19e4f6720761a865b7363386546327a1873..efba0e12ff1c4a03cbef831a8240016d3103cd2d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigk104.c @@ -25,7 +25,7 @@ #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c index 61237dbfa35a05b5db4b0b99c8ae4dfb36837f7d..472444c837bf92e203feacb211fb2e3fda9a486c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c @@ -26,7 +26,7 @@ #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c index cd888a1e443c77031b65d42f30bbf2a2c45f7ce4..8e9a06487d14f5a6f1dd21f1642f92582b3c5c9e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c @@ -27,6 +27,7 @@ #include #include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c index 6fa296c047b8710aedc3453ca9b1618a967c7dd1..503e9b5761c1aac3dcbf83300d6bf1eb7d9f9945 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlynv50.c @@ -27,6 +27,7 @@ #include #include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c index ab524bde77952214e74afb13385f8bde04b4cd00..dcd1836800bff58b19f061da8b0eda535d533fd4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c index 8591726871ac2cc973c5a267b978b90d5f97bf79..09d12067b1bb94f76950ec434b5826da7947ffc1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c @@ -29,6 +29,7 @@ #include #include +#include #include int @@ -39,7 +40,7 @@ gf119_disp_root_scanoutpos(NV50_DISP_MTHD_V0) const u32 blanke = nvkm_rd32(device, 0x64041c + (head * 0x300)); const u32 blanks = nvkm_rd32(device, 0x640420 + (head * 0x300)); union { - struct nv04_disp_scanoutpos_v0 v0; + struct nv50_disp_scanoutpos_v0 v0; } *args = data; int ret; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c index 2be846374d39aaf694fd8fd630bfe4b3e9c7f855..d73f1c6e325465792328303b599ca005c72b5d13 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv04.c @@ -27,6 +27,7 @@ #include #include +#include #include struct nv04_disp_root { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c index 06fb24d887021fe792c4e1ed25633620ea721354..2aba84d51b1e4e1fba38dda2f3e5e050434291ec 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c @@ -29,6 +29,7 @@ #include #include +#include #include int @@ -39,7 +40,7 @@ nv50_disp_root_scanoutpos(NV50_DISP_MTHD_V0) const u32 blanks = nvkm_rd32(device, 0x610af4 + (head * 0x540)); const u32 total = nvkm_rd32(device, 0x610afc + (head * 0x540)); union { - struct nv04_disp_scanoutpos_v0 v0; + struct nv50_disp_scanoutpos_v0 v0; } *args = data; int ret; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c index 29e0d2a9a839d12e35ea4a7e6fb0a2f143803aaf..6e8c954518d8e0de87ddfa16f5ae1651477a947d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c @@ -27,7 +27,7 @@ #include #include -#include +#include #include int