From 7468f51e03732b63801d29f60a8cee266caeecfb Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 13 Aug 2019 20:51:53 +0800 Subject: [PATCH] arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range() mainline inclusion from mainline-4.20-rc1 commit: 6899a4c82faf9b41bbddf330651a4d1155f8b64e category: feature feature: Reduce synchronous TLB invalidation on ARM64 bugzilla: NA CVE: NA -------------------------------------------------- flush_tlb_kernel_range() is only ever used to invalidate last-level entries, so we can restrict the scope of the TLB invalidation instruction. Acked-by: Peter Zijlstra (Intel) Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Signed-off-by: Hanjun Guo Reviewed-by: Xuefeng Wang Signed-off-by: Yang Yingliang --- arch/arm64/include/asm/tlbflush.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index a4a1901140ee..7e2a35424ca4 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -199,7 +199,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end dsb(ishst); for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12)) - __tlbi(vaae1is, addr); + __tlbi(vaale1is, addr); dsb(ish); isb(); } -- GitLab