From 68e3fff2c5177426ab029267b0363093fdae3787 Mon Sep 17 00:00:00 2001 From: Yupeng Zhou Date: Mon, 1 Jul 2019 19:55:58 +0800 Subject: [PATCH] hisi_sas: Fix the bist loopback issues. driver inclusion category: feature bugzilla: NA CVE: NA 1. modify the init bist data for PRBS test. 2. change the filename from 'loopback mode' to 'loopback_mode'. Signed-off-by: Yupeng Zhou Reviewed-by: luojian Reviewed-by: Yang Yingliang Signed-off-by: Yang Yingliang --- drivers/scsi/hisi_sas/hisi_sas_main.c | 2 +- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 4805e8390e71..696085024472 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -3627,7 +3627,7 @@ void hisi_sas_debugfs_init(struct hisi_hba *hisi_hba) &hisi_hba->bist_loopback_cnt)) goto fail_global; - if (!debugfs_create_file("loopback mode", 0400, + if (!debugfs_create_file("loopback_mode", 0400, hisi_hba->debugfs_bist_dentry, hisi_hba, &hisi_sas_debugfs_bist_mode_ops)) goto fail_global; diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index cb1b72064c73..a880e1729c69 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -211,6 +211,8 @@ #define CFG_BIST_MODE_SEL_MSK (0xf << CFG_BIST_MODE_SEL_OFF) #define CFG_LOOP_TEST_MODE_OFF 14 #define CFG_LOOP_TEST_MODE_MSK (0x3 << CFG_LOOP_TEST_MODE_OFF) +#define SAS_PHY_BIST_CODE (PORT_BASE + 0x30) +#define SAS_PHY_BIST_CODE1 (PORT_BASE + 0x34) #define CFG_RX_BIST_EN_OFF 16 #define CFG_RX_BIST_EN_MSK (0x1 << CFG_RX_BIST_EN_OFF) #define CFG_TX_BIST_EN_OFF 17 @@ -3131,6 +3133,14 @@ static void hisi_sas_bist_test_restore_v3_hw(struct hisi_hba *hisi_hba) reg_val &= ~CFG_ALOS_CHK_DISABLE_MSK; hisi_sas_phy_write32(hisi_hba, phy_id, SERDES_CFG, reg_val); + /*restore the linkrate*/ + reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, PROG_PHY_LINK_RATE); + /* init OOB link rate as 1.5 Gbits */ + reg_val &= ~CFG_PROG_PHY_LINK_RATE_MSK; + reg_val |= (0x800 << CFG_PROG_PHY_LINK_RATE_OFF); + hisi_sas_phy_write32(hisi_hba, phy_id, + PROG_PHY_LINK_RATE, reg_val); + /* enable PHY */ hisi_sas_phy_enable(hisi_hba, phy_id, 1); } @@ -3172,6 +3182,12 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) hisi_sas_phy_write32(hisi_hba, phy_id, SAS_PHY_BIST_CTRL, reg_val); + /*set the bist init data*/ + hisi_sas_phy_write32(hisi_hba, phy_id, + SAS_PHY_BIST_CODE, 0x1); + hisi_sas_phy_write32(hisi_hba, phy_id, + SAS_PHY_BIST_CODE1, 0x80); + mdelay(100); reg_val |= (CFG_RX_BIST_EN_MSK | CFG_TX_BIST_EN_MSK); hisi_sas_phy_write32(hisi_hba, phy_id, -- GitLab