diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 2487046457c83caec7753ed7489e88089044eec4..a983a5ee317276688e122a059eb80136c4ab9102 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -585,7 +585,7 @@ bool dc_link_detect(struct dc_link *link, bool boot)
 		}
 
 		case SIGNAL_TYPE_EDP: {
-			detect_dp_sink_caps(link);
+			detect_edp_sink_caps(link);
 			sink_caps.transaction_type =
 				DDC_TRANSACTION_TYPE_I2C_OVER_AUX;
 			sink_caps.signal = SIGNAL_TYPE_EDP;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index d9754b5f254377643d963a46e9e2ba94424c2b7d..17506345f97ac9653689aa59509ca1632efd5356 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1147,7 +1147,6 @@ bool dp_hbr_verify_link_cap(
 		LINK_SPREAD_DISABLED;
 	}
 
-	link->max_link_setting = link->verified_link_cap;
 
 	return success;
 }
@@ -1466,7 +1465,7 @@ void decide_link_settings(struct dc_stream *stream,
      * 2. could support the b/w requested by the timing
      */
 	while (current_link_setting.link_rate <=
-			link->max_link_setting.link_rate) {
+			link->verified_link_cap.link_rate) {
 		link_bw = bandwidth_in_kbps_from_link_settings(
 				&current_link_setting);
 		if (req_bw <= link_bw) {
@@ -1475,7 +1474,7 @@ void decide_link_settings(struct dc_stream *stream,
 		}
 
 		if (current_link_setting.lane_count <
-				link->max_link_setting.lane_count) {
+				link->verified_link_cap.lane_count) {
 			current_link_setting.lane_count =
 					increase_lane_count(
 							current_link_setting.lane_count);
@@ -2294,6 +2293,12 @@ void detect_dp_sink_caps(struct dc_link *link)
 	/* TODO save sink caps in link->sink */
 }
 
+void detect_edp_sink_caps(struct dc_link *link)
+{
+	retrieve_link_cap(link);
+	link->verified_link_cap = link->reported_link_cap;
+}
+
 void dc_link_dp_enable_hpd(const struct dc_link *link)
 {
 	struct link_encoder *encoder = link->link_enc;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index 76dc169168213cd2e3324fdddbc59801a35f1742..f2f57a75f864151d22b868f5d28ed05435a9d6c7 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -114,9 +114,7 @@ void dp_disable_link_phy(struct dc_link *link, enum signal_type signal)
 
 	if (signal == SIGNAL_TYPE_EDP) {
 		link->link_enc->funcs->backlight_control(link->link_enc, false);
-		if (link->dpcd_sink_count)
-			link->link_enc->funcs->power_control(link->link_enc,
-									false);
+		link->link_enc->funcs->power_control(link->link_enc, false);
 	}
 
 	link->link_enc->funcs->disable_output(link->link_enc, signal);
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index b20f7bfcdc1f304e60419fc7593d30711178f117..58bfb867b71c360c55fbf0242b917197a3a7b74d 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -744,7 +744,6 @@ struct dc_link {
 	 */
 	struct dc_link_settings reported_link_cap;
 	struct dc_link_settings verified_link_cap;
-	struct dc_link_settings max_link_setting;
 	struct dc_link_settings cur_link_settings;
 	struct dc_lane_settings cur_lane_setting;
 	struct dc_link_settings preferred_link_setting;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
index 5b4185053e9c5e6f719f0568252e9425ecb171ca..1a4a605cb449c809a02a3258153d7d8ba0b36146 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
@@ -63,6 +63,8 @@ bool is_mst_supported(struct dc_link *link);
 
 void detect_dp_sink_caps(struct dc_link *link);
 
+void detect_edp_sink_caps(struct dc_link *link);
+
 bool is_dp_active_dongle(const struct dc_link *link);
 
 void dp_enable_mst_on_sink(struct dc_link *link, bool enable);