From 3bc26c9cd56a1b4787774d70b34282616a34b201 Mon Sep 17 00:00:00 2001 From: liulongfang Date: Fri, 9 Aug 2019 21:21:18 +0800 Subject: [PATCH] ACC: HPRE&ZIP: qm current_q limit num error driver inclusion category: bugfix bugzilla: NA CVE: NA After creating the acc's VF device and select the VF device ID. The acc's qm current_q num sync with the VF's queue num. The patch let it sync with the selected VF's queue num Feature or Bugfix:Bugfix Signed-off-by: liulongfang Reviewed-by: wangzhou Signed-off-by: lingmingqiang Reviewed-by: lingmingqiang Reviewed-by: Yang Yingliang Signed-off-by: Yang Yingliang --- drivers/crypto/hisilicon/hpre/hpre_main.c | 18 ++++++++++++++++-- drivers/crypto/hisilicon/qm.c | 2 +- drivers/crypto/hisilicon/qm.h | 1 + drivers/crypto/hisilicon/zip/zip_main.c | 20 +++++++++++++++++--- 4 files changed, 35 insertions(+), 6 deletions(-) diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c index 9680d488b149..8d7095b26b92 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_main.c +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -469,11 +469,23 @@ static int current_qm_write(struct hpre_debugfs_file *file, u32 val) { struct hisi_qm *qm = file_to_qm(file); struct hpre_ctrl *ctrl = file->ctrl; + u32 vfq_num; u32 tmp; if (val > ctrl->num_vfs) return -EINVAL; + /* According PF or VF Dev ID to calculation the curr_qm_qp_num */ + vfq_num = (qm->ctrl_q_num - qm->qp_num) / ctrl->num_vfs; + if (val == 0) { + qm->debug.curr_qm_qp_num = qm->qp_num; + } else if (val == ctrl->num_vfs) { + qm->debug.curr_qm_qp_num = qm->ctrl_q_num - qm->qp_num - + (ctrl->num_vfs - 1) * vfq_num; + } else { + qm->debug.curr_qm_qp_num = vfq_num; + } + writel(val, qm->io_base + QM_DFX_MB_CNT_VF); writel(val, qm->io_base + QM_DFX_DB_CNT_VF); @@ -804,6 +816,7 @@ static int hpre_qm_pre_init(struct hisi_qm *qm, struct pci_dev *pdev) if (pdev->is_physfn) { qm->qp_base = HPRE_PF_DEF_Q_BASE; qm->qp_num = pf_q_num; + qm->debug.curr_qm_qp_num = pf_q_num; } return 0; @@ -1425,9 +1438,10 @@ static void hpre_remove(struct pci_dev *pdev) } } #endif - if (qm->fun_type == QM_HW_PF) + if (qm->fun_type == QM_HW_PF) { hpre_cnt_regs_clear(qm); - + qm->debug.curr_qm_qp_num = 0; + } hpre_debugfs_exit(hpre); hisi_qm_stop(qm, QM_NORMAL); if (qm->fun_type == QM_HW_PF) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index ead81d059f04..ce7c7944ef96 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -825,7 +825,7 @@ static int current_q_write(struct debugfs_file *file, u32 val) struct hisi_qm *qm = file_to_qm(file); u32 tmp; - if (val >= qm->qp_num) + if (val >= qm->debug.curr_qm_qp_num) return -EINVAL; tmp = val << QM_DFX_QN_SHIFT | diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h index 945275128c6c..5fea1676c9ae 100644 --- a/drivers/crypto/hisilicon/qm.h +++ b/drivers/crypto/hisilicon/qm.h @@ -130,6 +130,7 @@ struct debugfs_file { }; struct qm_debug { + u32 curr_qm_qp_num; struct dentry *debug_root; struct dentry *qm_d; struct debugfs_file files[DEBUG_FILE_NUM]; diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c index 4549d1abc48d..341686f77cd7 100644 --- a/drivers/crypto/hisilicon/zip/zip_main.c +++ b/drivers/crypto/hisilicon/zip/zip_main.c @@ -416,7 +416,7 @@ static void hisi_zip_set_user_domain_and_cache(struct hisi_zip *hisi_zip) hisi_zip->qm.io_base + QM_CACHE_CTL); } -/* hisi_zip_cnt_regs_clear() - clear the hpre cnt regs */ +/* hisi_zip_cnt_regs_clear() - clear the zip cnt regs */ static void hisi_zip_cnt_regs_clear(struct hisi_qm *qm) { /* clear current_qm */ @@ -478,11 +478,23 @@ static int current_qm_write(struct ctrl_debug_file *file, u32 val) { struct hisi_qm *qm = file_to_qm(file); struct hisi_zip_ctrl *ctrl = file->ctrl; + u32 vfq_num; u32 tmp; if (val > ctrl->num_vfs) return -EINVAL; + /* According PF or VF Dev ID to calculation the curr_qm_qp_num */ + vfq_num = (qm->ctrl_q_num - qm->qp_num) / ctrl->num_vfs; + if (val == 0) { + qm->debug.curr_qm_qp_num = qm->qp_num; + } else if (val == ctrl->num_vfs) { + qm->debug.curr_qm_qp_num = qm->ctrl_q_num - qm->qp_num - + (ctrl->num_vfs - 1) * vfq_num; + } else { + qm->debug.curr_qm_qp_num = vfq_num; + } + writel(val, qm->io_base + QM_DFX_MB_CNT_VF); writel(val, qm->io_base + QM_DFX_DB_CNT_VF); @@ -798,6 +810,7 @@ static int hisi_zip_probe(struct pci_dev *pdev, const struct pci_device_id *id) qm->qp_base = HZIP_PF_DEF_Q_BASE; qm->qp_num = pf_q_num; + qm->debug.curr_qm_qp_num = pf_q_num; } else if (qm->fun_type == QM_HW_VF) { /* * have no way to get qm configure in VM in v1 hardware, @@ -948,9 +961,10 @@ static void hisi_zip_remove(struct pci_dev *pdev) if (qm->fun_type == QM_HW_PF && hisi_zip->ctrl->num_vfs != 0) hisi_zip_sriov_disable(pdev); - if (qm->fun_type == QM_HW_PF) + if (qm->fun_type == QM_HW_PF) { hisi_zip_cnt_regs_clear(qm); - + qm->debug.curr_qm_qp_num = 0; + } hisi_zip_debugfs_exit(hisi_zip); hisi_qm_stop(qm, QM_NORMAL); -- GitLab