From 35d287a9f78dd4d7b080dee2eea3afce73d1bde1 Mon Sep 17 00:00:00 2001 From: Peter De Schrijver <pdeschrijver@nvidia.com> Date: Wed, 5 Jun 2013 17:21:46 +0300 Subject: [PATCH] clk: tegra: fix pllre initilization The PLLRE flags weren't set correctly. Fixed in this patch. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> --- drivers/clk/tegra/clk-pll.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 3b778d3c828e..393b60c9c49d 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -1409,7 +1409,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, struct tegra_clk_pll *pll; struct clk *clk; - pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE; + pll_flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC; pll = _tegra_init_pll(clk_base, pmc, fixed_rate, pll_params, pll_flags, freq_table, lock); if (IS_ERR(pll)) @@ -1436,7 +1436,6 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, val &= ~BIT(29); pll_writel_misc(val, pll); - pll_flags |= TEGRA_PLL_LOCK_MISC; clk = _tegra_clk_register_pll(pll, name, parent_name, flags, &tegra_clk_pllre_ops); if (IS_ERR(clk)) -- GitLab