From 339f5888e7ad2d66ed46c14fcdedbcced00b0ae7 Mon Sep 17 00:00:00 2001 From: zhangwei Date: Tue, 13 Aug 2019 19:04:34 +0800 Subject: [PATCH] ACC: sync acc kernel driver code to hulk driver inclusion category: bugfix bugzilla: NA CVE: NA Feature or Bugfix:Bugfix Signed-off-by: Zhangwei Reviewed-by: lingmingqiang Reviewed-by: Yang Yingliang Signed-off-by: Yang Yingliang --- drivers/crypto/hisilicon/Kconfig | 26 ++++++++++----------- drivers/crypto/hisilicon/hpre/hpre_crypto.c | 3 ++- drivers/crypto/hisilicon/hpre/hpre_main.c | 6 ++--- drivers/crypto/hisilicon/qm.c | 5 ++-- drivers/crypto/hisilicon/sec2/sec_main.c | 6 ++--- drivers/crypto/hisilicon/zip/zip.h | 1 - drivers/crypto/hisilicon/zip/zip_main.c | 6 ++--- 7 files changed, 26 insertions(+), 27 deletions(-) diff --git a/drivers/crypto/hisilicon/Kconfig b/drivers/crypto/hisilicon/Kconfig index faa57a5220f7..99980890ae1d 100644 --- a/drivers/crypto/hisilicon/Kconfig +++ b/drivers/crypto/hisilicon/Kconfig @@ -43,18 +43,18 @@ config CRYPTO_DEV_HISI_HPRE Support for HiSilicon HIP09 HPRE engine. config CRYPTO_DEV_HISI_SEC2 - tristate "Support for HISI SEC Driver" - depends on ARM64 - select CRYPTO_DEV_HISI_QM - select CRYPTO_HISI_SGL - select CRYPTO_BLKCIPHER - select CRYPTO_ALGAPI - help - Support for HiSilicon HIP09 SEC Driver. + tristate "Support for HISI SEC Driver" + depends on ARM64 + select CRYPTO_DEV_HISI_QM + select CRYPTO_HISI_SGL + select CRYPTO_BLKCIPHER + select CRYPTO_ALGAPI + help + Support for HiSilicon HIP09 SEC Driver. config CRYPTO_DEV_HISI_RDE - tristate "Support for HISI RDE Driver" - depends on ARM64 - select CRYPTO_DEV_HISI_QM - help - Support for HiSilicon HIP09 RDE Driver. + tristate "Support for HISI RDE Driver" + depends on ARM64 + select CRYPTO_DEV_HISI_QM + help + Support for HiSilicon HIP09 RDE Driver. diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto.c b/drivers/crypto/hisilicon/hpre/hpre_crypto.c index a9fdfe439d43..7fbdc67dce91 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_crypto.c +++ b/drivers/crypto/hisilicon/hpre/hpre_crypto.c @@ -867,7 +867,8 @@ static int hpre_rsa_setkey_crt(struct hpre_ctx *ctx, struct rsa_key *rsa_key) return 0; free_key: - memset(ctx->rsa.crt_prikey + hlf_ksz * _CRT_PRMS, '\0', hlf_ksz); + offset = hlf_ksz * _CRT_PRMS; + memset(ctx->rsa.crt_prikey + offset, '\0', hlf_ksz); dma_free_coherent(dev, hlf_ksz * _CRT_PRMS, ctx->rsa.crt_prikey, ctx->rsa.dma_crt_prikey); ctx->rsa.crt_prikey = NULL; diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c index 0514f71312c9..f9e36727572f 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_main.c +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -801,7 +801,7 @@ static int hpre_qm_pre_init(struct hisi_qm *qm, struct pci_dev *pdev) qm->use_uacce = false; break; case UACCE_MODE_UACCE: -#ifdef CONFIG_IOMMU_SVA2 +#ifdef CONFIG_IOMMU_SVA qm->use_dma_api = true; qm->use_sva = true; #else @@ -1507,7 +1507,7 @@ static int __init hpre_init(void) pr_err("hpre: can't register hisi hpre driver.\n"); goto fail_to_register_pci; } -#ifndef CONFIG_IOMMU_SVA2 +#ifndef CONFIG_IOMMU_SVA if (uacce_mode == UACCE_MODE_UACCE) return 0; #endif @@ -1528,7 +1528,7 @@ static int __init hpre_init(void) static void __exit hpre_exit(void) { -#ifndef CONFIG_IOMMU_SVA2 +#ifndef CONFIG_IOMMU_SVA if (uacce_mode != UACCE_MODE_UACCE) hpre_algs_unregister(); #else diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 395a46b34ba5..180f80886cc9 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -173,9 +173,9 @@ (((hop_num) << QM_SQ_HOP_NUM_SHIFT) | \ ((pg_sz) << QM_SQ_PAGE_SIZE_SHIFT) | \ ((buf_sz) << QM_SQ_BUF_SIZE_SHIFT) | \ - (ilog2(sqe_sz) << QM_SQ_SQE_SIZE_SHIFT)) + ((u32)ilog2(sqe_sz) << QM_SQ_SQE_SIZE_SHIFT)) #define QM_MK_SQC_DW3_V2(sqe_sz) \ - ((QM_Q_DEPTH - 1) | (ilog2(sqe_sz) << QM_SQ_SQE_SIZE_SHIFT)) + ((QM_Q_DEPTH - 1) | ((u32)ilog2(sqe_sz) << QM_SQ_SQE_SIZE_SHIFT)) #define INIT_QC_COMMON(qc, base, pasid) do { \ (qc)->head = 0; \ @@ -1171,7 +1171,6 @@ static struct hisi_qp *hisi_qm_create_qp_nolock(struct hisi_qm *qm, qp_id = find_first_zero_bit(qm->qp_bitmap, qm->qp_num); if (qp_id >= qm->qp_num) { dev_info_ratelimited(&qm->pdev->dev, "QM all queues are busy!\n"); - ret = -EBUSY; goto err_free_qp; } diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c index 9c2dfdfa6918..752c687c757e 100644 --- a/drivers/crypto/hisilicon/sec2/sec_main.c +++ b/drivers/crypto/hisilicon/sec2/sec_main.c @@ -823,7 +823,7 @@ static int hisi_sec_qm_init(struct hisi_qm *qm, struct pci_dev *pdev) qm->use_uacce = false; break; case UACCE_MODE_UACCE: -#ifdef CONFIG_IOMMU_SVA2 +#ifdef CONFIG_IOMMU_SVA qm->use_dma_api = true; qm->use_sva = true; #else @@ -1516,7 +1516,7 @@ static int __init hisi_sec_init(void) pr_err("Failed to register pci driver.\n"); goto err_pci; } -#ifndef CONFIG_IOMMU_SVA2 +#ifndef CONFIG_IOMMU_SVA if (uacce_mode == UACCE_MODE_UACCE) return 0; #endif @@ -1546,7 +1546,7 @@ static int __init hisi_sec_init(void) static void __exit hisi_sec_exit(void) { -#ifndef CONFIG_IOMMU_SVA2 +#ifndef CONFIG_IOMMU_SVA if (uacce_mode != UACCE_MODE_UACCE) hisi_sec_unregister_from_crypto(); #else diff --git a/drivers/crypto/hisilicon/zip/zip.h b/drivers/crypto/hisilicon/zip/zip.h index 05132a27a9d3..f3584c53670e 100644 --- a/drivers/crypto/hisilicon/zip/zip.h +++ b/drivers/crypto/hisilicon/zip/zip.h @@ -1,5 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0+ */ -/* Copyright (c) 2018 HiSilicon Limited. */ /* * Copyright (c) 2018-2019 HiSilicon Limited. * diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c index 49798056b1a2..796b52c935df 100644 --- a/drivers/crypto/hisilicon/zip/zip_main.c +++ b/drivers/crypto/hisilicon/zip/zip_main.c @@ -779,7 +779,7 @@ static int hisi_zip_probe(struct pci_dev *pdev, const struct pci_device_id *id) qm->use_uacce = false; break; case UACCE_MODE_UACCE: -#ifdef CONFIG_IOMMU_SVA2 +#ifdef CONFIG_IOMMU_SVA qm->use_dma_api = true; qm->use_sva = true; #else @@ -1423,7 +1423,7 @@ static int __init hisi_zip_init(void) goto err_pci; } -#ifndef CONFIG_IOMMU_SVA2 +#ifndef CONFIG_IOMMU_SVA if (uacce_mode == UACCE_MODE_UACCE) return 0; #endif @@ -1446,7 +1446,7 @@ static int __init hisi_zip_init(void) static void __exit hisi_zip_exit(void) { -#ifndef CONFIG_IOMMU_SVA2 +#ifndef CONFIG_IOMMU_SVA if (uacce_mode != UACCE_MODE_UACCE) hisi_zip_unregister_from_crypto(); #else -- GitLab