From 2e6d83ca43d214a53153cbc45877b910bae11261 Mon Sep 17 00:00:00 2001 From: Weihang Li Date: Fri, 11 Oct 2019 21:13:19 +0800 Subject: [PATCH] net: hns3: code optimizaition of hclge_handle_hw_ras_error() driver inclusion category: bugfix bugzilla: NA CVE: NA This patch syncronizes some difference from kernel-dev branch, which optimizes hclge_handle_hw_ras_error() to make the code logic clearer. 1. If there was no NIC or Roce RAS when we read HCLGE_RAS_PF_OTHER_INT_STS_REG, we return directly. 2. Because NIC and Roce RAS may occurs at the same time, so we should check value of revision at first before we handle Roce RAS instead of only checking it in branch of no NIC RAS is detected. 3. Check HCLGE_STATE_RST_HANDLING each time before we want to return PCI_ERS_RESULT_NEED_RESET. 4. Remove checking of HCLGE_RAS_REG_NFE_MASK and HCLGE_RAS_REG_ROCEE_ERR_MASK because if hw_err_reset_req is not zero, it proves that we have set it in handling of NIC or Roce RAS. 5. Remove override_pci_need_reset, because hw_err_reset_req can be used to record reset level that we need to recover from a RAS error. Feature or Bugfix:Bugfix Signed-off-by: Weihang Li Signed-off-by: Yufeng Mo Reviewed-by: tanhuazhong Reviewed-by: lipeng Reviewed-by: Yunsheng Lin Signed-off-by: Yang Yingliang --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 2 -- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 2 +- .../hisilicon/hns3/hns3pf/hclge_err.c | 22 +++++++------------ 3 files changed, 9 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 9bac4a92d7a4..b169ab670b15 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -230,8 +230,6 @@ struct hnae3_ae_dev { const struct hnae3_ae_ops *ops; struct list_head node; u32 flag; - /* workaround to stop multiple reset happening */ - u8 override_pci_need_reset; unsigned long hw_err_reset_req; enum hnae3_reset_type reset_type; void *priv; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index f5d3a24534e4..d75beefcd7e8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -2215,7 +2215,7 @@ static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev) /* request the reset */ if (ops->reset_event && ops->get_reset_level && ops->set_default_reset_request) { - if (!ae_dev->override_pci_need_reset) { + if (ae_dev->hw_err_reset_req) { reset_type = ops->get_reset_level(ae_dev, &ae_dev->hw_err_reset_req); ops->set_default_reset_request(ae_dev, reset_type); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c index d367d0660e70..eaef382cf9d0 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c @@ -1677,6 +1677,8 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev) if (status & HCLGE_RAS_REG_NFE_MASK || status & HCLGE_RAS_REG_ROCEE_ERR_MASK) ae_dev->hw_err_reset_req = 0; + else + goto out; /* Handling Non-fatal HNS RAS errors */ if (status & HCLGE_RAS_REG_NFE_MASK) { @@ -1689,27 +1691,19 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev) if (ret) return PCI_ERS_RESULT_RECOVERED; } - } else { - if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) || - hdev->pdev->revision < 0x21) { - ae_dev->override_pci_need_reset = 1; - return PCI_ERS_RESULT_RECOVERED; - } } - if (status & HCLGE_RAS_REG_ROCEE_ERR_MASK) { - dev_err(dev, "ROCEE uncorrected RAS error identified\n"); + /* Handling Non-fatal Rocee RAS errors */ + if (hdev->pdev->revision >= 0x21 && + status & HCLGE_RAS_REG_ROCEE_ERR_MASK) { + dev_err(dev, "ROCEE Non-Fatal RAS error identified\n"); hclge_handle_rocee_ras_error(ae_dev); } - if ((status & HCLGE_RAS_REG_NFE_MASK || - status & HCLGE_RAS_REG_ROCEE_ERR_MASK) && - ae_dev->hw_err_reset_req) { - ae_dev->override_pci_need_reset = 0; + if (ae_dev->hw_err_reset_req) return PCI_ERS_RESULT_NEED_RESET; - } - ae_dev->override_pci_need_reset = 1; +out: return PCI_ERS_RESULT_RECOVERED; } -- GitLab