diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c
index 19ccdfcfd87aee01234e2191acabfffa59a240e7..95ab6ae62b531a1c2530627eb91f4c99db65f189 100644
--- a/drivers/crypto/hisilicon/hpre/hpre_main.c
+++ b/drivers/crypto/hisilicon/hpre/hpre_main.c
@@ -1190,6 +1190,11 @@ static void hpre_reset_prepare(struct pci_dev *pdev)
 		return;
 	}
 
+#ifdef CONFIG_CRYPTO_QM_UACCE
+	if (qm->use_uacce)
+		uacce_reset_prepare(&qm->uacce);
+#endif
+
 	dev_info(dev, "FLR resetting...\n");
 }
 
@@ -1225,6 +1230,12 @@ static void hpre_reset_done(struct pci_dev *pdev)
 			}
 		}
 	}
+
+#ifdef CONFIG_CRYPTO_QM_UACCE
+	if (qm->use_uacce)
+		uacce_reset_done(&qm->uacce);
+#endif
+
 	dev_info(dev, "FLR reset complete\n");
 }
 
diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c
index 81c9a262ee899113f594916eefe2d60243f900ef..a8e06d7f98ec685758a68ee34601b34bb78afcae 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -1206,6 +1206,11 @@ static void hisi_zip_reset_prepare(struct pci_dev *pdev)
 
 	hisi_zip_vf_flr_reset_prepare(pdev);
 
+#ifdef CONFIG_CRYPTO_QM_UACCE
+	if (qm->use_uacce)
+		uacce_reset_prepare(&qm->uacce);
+#endif
+
 	dev_info(dev, "FLR resetting...\n");
 }
 
@@ -1252,6 +1257,10 @@ static void hisi_zip_reset_done(struct pci_dev *pdev)
 
 	hisi_zip_vf_flr_reset_done(pdev);
 
+#ifdef CONFIG_CRYPTO_QM_UACCE
+	if (qm->use_uacce)
+		uacce_reset_done(&qm->uacce);
+#endif
 	dev_info(dev, "FLR reset complete\n");
 }