diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fa279f3cc838f8bf73276456a4af288ac11d97b7..54786bc732632af7374df70207b3c17c834ebaab 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1184,6 +1184,7 @@ struct i915_psr {
 	void (*disable_source)(struct intel_dp *,
 			       const struct intel_crtc_state *);
 	void (*activate)(struct intel_dp *);
+	void (*setup_vsc)(struct intel_dp *, const struct intel_crtc_state *);
 };
 
 enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 7031dfd50ae9689471b283f82bbfbaf27caf7e99..2516d2a50022eacca53583e8cf4f216cd9306b31 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -540,18 +540,15 @@ void intel_psr_enable(struct intel_dp *intel_dp,
 
 	dev_priv->psr.busy_frontbuffer_bits = 0;
 
-	if (HAS_DDI(dev_priv)) {
-
-		hsw_psr_setup_vsc(intel_dp, crtc_state);
+	dev_priv->psr.setup_vsc(intel_dp, crtc_state);
 
+	if (HAS_DDI(dev_priv)) {
 		/* Enable PSR on the panel */
 		hsw_psr_enable_sink(intel_dp);
 
 		hsw_psr_enable_source(intel_dp, crtc_state);
 
 	} else {
-		vlv_psr_setup_vsc(intel_dp, crtc_state);
-
 		/* Enable PSR on the panel */
 		vlv_psr_enable_sink(intel_dp);
 
@@ -983,8 +980,10 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
 	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 		dev_priv->psr.disable_source = vlv_psr_disable;
 		dev_priv->psr.activate = vlv_psr_activate;
+		dev_priv->psr.setup_vsc = vlv_psr_setup_vsc;
 	} else {
 		dev_priv->psr.disable_source = hsw_psr_disable;
 		dev_priv->psr.activate = hsw_psr_activate;
+		dev_priv->psr.setup_vsc = hsw_psr_setup_vsc;
 	}
 }