pcie: hisi pcie dfx driver

driver inclusion
category: feature
bugzilla: NA
CVE: NA

hisi_pcie_cae:hisi pcie debug driver for hiarmtool. This driver can
create /dev/pcie_reg_dev file and map pcie regs to userspace. Hiarmtool
can use this file to access pcie regs in order to get useful dfx
information about pcie module.
Signed-off-by: Nliuyanshi <liuyanshi@huawei.com>
Reviewed-by: NLi Jingyi <jingyi.li@huawei.com>
Acked-by: NHanjun Guo <guohanjun@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

MAINTAINERS

@@ -11355,6 +11355,11 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt
 F:	drivers/pci/controller/dwc/pcie-histb.c
 
+PCIE DFX DRIVER FOR HISILICON
+M:	Liu Yanshi <liuyanshi@huawei.com>
+S:	Maintained
+F:	drivers/pci/controller/hisi-pcie-customer/
+
 PCIE DRIVER FOR MEDIATEK
 M:	Ryder Lee <ryder.lee@mediatek.com>
 L:	linux-pci@vger.kernel.org

drivers/pci/controller/Kconfig

@@ -279,4 +279,5 @@ config VMD
 	  module will be called vmd.
 
 source "drivers/pci/controller/dwc/Kconfig"
+source "drivers/pci/controller/hisi-pcie-customer/Kconfig"
 endmenu

drivers/pci/controller/Makefile

@@ -31,6 +31,7 @@ obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o
 obj-$(CONFIG_VMD) += vmd.o
 # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW
 obj-y				+= dwc/
+obj-y += hisi-pcie-customer/
 
 
 # The following drivers are for devices that use the generic ACPI

drivers/pci/controller/hisi-pcie-customer/Kconfig

+config HISILICON_PCIE_CAE
+	tristate "hisi custom pcie driver for hiarmtool"
+	default m
\ No newline at end of file

drivers/pci/controller/hisi-pcie-customer/Makefile

+pcie_cae-objs := hisi_pcie_cae.o
+obj-$(CONFIG_HISILICON_PCIE_CAE) += pcie_cae.o
\ No newline at end of file

drivers/pci/controller/hisi-pcie-customer/hisi_pcie_cae.c

+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2016-2017 Hisilicon Limited.
+
+#include <linux/mm.h>
+#include <linux/miscdevice.h>
+#include <linux/device.h>
+#include <linux/module.h>
+
+#define	CHIP_OFFSET			0x200000000000UL
+#define	APB_SUBCTRL_BASE	0x148070000UL
+
+#define	DEVICE_NAME "pcie_reg_dev"
+
+static const struct vm_operations_struct mmap_pcie_mem_ops = {
+#ifdef CONFIG_HAVE_IOREMAP_PROT
+	.access = generic_access_phys
+#endif
+};
+
+static int pcie_reg_mmap(struct file *filep, struct vm_area_struct *vma)
+{
+	u64 size = vma->vm_end - vma->vm_start;
+	u32 chip_id = (u32)vma->vm_pgoff;
+	u64 phy_addr;
+
+	pr_info("[PCIe Base] tools map chipid:%d\n", chip_id);
+	phy_addr = APB_SUBCTRL_BASE + CHIP_OFFSET * chip_id;
+	/* It's illegal to wrap around the end of the physical address space. */
+	vma->vm_pgoff = phy_addr >> PAGE_SHIFT;
+
+	vma->vm_page_prot =  pgprot_device(vma->vm_page_prot);
+
+	vma->vm_ops = &mmap_pcie_mem_ops;
+
+	/* Remap-pfn-range will mark the range VM_IO */
+	if (remap_pfn_range(vma,
+			    vma->vm_start,
+			    vma->vm_pgoff,
+			    size,
+			    vma->vm_page_prot)) {
+		return -EAGAIN;
+	}
+	return 0;
+}
+
+static int pcie_open(struct inode *inode, struct file *f)
+{
+	return 0;
+}
+
+static int pcie_release(struct inode *inode, struct file *f)
+{
+	return 0;
+}
+
+static const struct file_operations pcie_dfx_fops = {
+	.owner          = THIS_MODULE,
+	.open           = pcie_open,
+	.release        = pcie_release,
+	.llseek         = noop_llseek,
+	.mmap           = pcie_reg_mmap,
+};
+
+static struct miscdevice pcie_dfx_misc = {
+	.minor = MISC_DYNAMIC_MINOR,
+	.fops = &pcie_dfx_fops,
+	.name = DEVICE_NAME,
+};
+
+static int __init misc_dev_init(void)
+{
+	return misc_register(&pcie_dfx_misc);
+}
+
+static void __exit misc_dev_exit(void)
+{
+	(void)misc_deregister(&pcie_dfx_misc);
+}
+
+module_init(misc_dev_init);
+module_exit(misc_dev_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Huawei Technology Company");
+MODULE_DESCRIPTION("PCIe DFX TOOL");
+MODULE_VERSION("V1.0");
+