ARM: dts: imx6sx-sabreauto: add external 24MHz clock source

On i.MX6SX SabreAuto board, there is external 24MHz clock
source for analog clock2, add this clock source to clock tree
and remove "clocks" container for all input clocks.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

arch/arm/boot/dts/imx6sx-sabreauto.dts

@@ -37,6 +37,10 @@
 	};
 };
 
+&anaclk2 {
+	clock-frequency = <24576000>;
+};
+
 &uart1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;

arch/arm/boot/dts/imx6sx.dtsi

@@ -104,41 +104,46 @@
 		interrupt-parent = <&intc>;
 	};
 
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ckil: clock@0 {
+	ckil: clock-ckil {
 		compatible = "fixed-clock";
-			reg = <0>;
 		#clock-cells = <0>;
 		clock-frequency = <32768>;
 		clock-output-names = "ckil";
 	};
 
-		osc: clock@1 {
+	osc: clock-osc {
 		compatible = "fixed-clock";
-			reg = <1>;
 		#clock-cells = <0>;
 		clock-frequency = <24000000>;
 		clock-output-names = "osc";
 	};
 
-		ipp_di0: clock@2 {
+	ipp_di0: clock-ipp-di0 {
 		compatible = "fixed-clock";
-			reg = <2>;
 		#clock-cells = <0>;
 		clock-frequency = <0>;
 		clock-output-names = "ipp_di0";
 	};
 
-		ipp_di1: clock@3 {
+	ipp_di1: clock-ipp-di1 {
 		compatible = "fixed-clock";
-			reg = <3>;
 		#clock-cells = <0>;
 		clock-frequency = <0>;
 		clock-output-names = "ipp_di1";
 	};
+
+	anaclk1: clock-anaclk1 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+		clock-output-names = "anaclk1";
+	};
+
+	anaclk2: clock-anaclk2 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+		clock-output-names = "anaclk2";
 	};
 
 	tempmon: tempmon {
@@ -575,8 +580,8 @@
 				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
 				#clock-cells = <1>;
-				clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
-				clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
+				clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
+				clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
 			};
 
 			anatop: anatop@20c8000 {