diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index c2157d2463b3526b68b55caaa64768afd6bcfd4c..7326dbca28cf280bf305a7a46cbbb561b6d2601a 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -1553,13 +1553,20 @@ static int hclge_vport_setup(struct hclge_vport *vport, u16 num_tqps)
 {
 	struct hnae3_handle *nic = &vport->nic;
 	struct hclge_dev *hdev = vport->back;
+	u16 alloc_tqps;
 	int ret;
 
 	nic->pdev = hdev->pdev;
 	nic->ae_algo = &ae_algo;
 	nic->numa_node_mask = hdev->numa_node_mask;
 
-	ret = hclge_knic_setup(vport, num_tqps,
+	/* if irq is not enough, let tqps have the same value of irqs,
+	 * to make sure one irq just bind to one tqp, this can improve
+	 * the performance
+	 */
+	alloc_tqps = min(hdev->num_msi_left, num_tqps);
+
+	ret = hclge_knic_setup(vport, alloc_tqps,
 			       hdev->num_tx_desc, hdev->num_rx_desc);
 	if (ret)
 		dev_err(&hdev->pdev->dev, "knic setup failed %d\n", ret);
@@ -2269,7 +2276,18 @@ static int hclge_init_msi(struct hclge_dev *hdev)
 			 hdev->num_msi, vectors);
 
 	hdev->num_msi = vectors;
+
+	/* num_msi_left means the vector number of nic.
+	 * 1. if not support RoCE, roce_base_msix_offset is 0, the num_msi_left
+	 * equals to vectors.
+	 * 2. if support RoCE, roce_base_msix_offset means the vector number of
+	 * nic, so num_msi_left equals to roce_base_msix_offset.
+	 */
 	hdev->num_msi_left = vectors;
+	if (hnae3_dev_roce_supported(hdev))
+		hdev->num_msi_left = min(hdev->num_msi_left,
+					 hdev->roce_base_msix_offset);
+
 	hdev->base_msi_vector = pdev->irq;
 	hdev->roce_base_vector = hdev->base_msi_vector +
 				hdev->roce_base_msix_offset;
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 8d22bd8139ccf19eb8039af7ff41e727fb91118f..cedfc51a620e06135e5d921c1f73c0170fd0b506 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -249,6 +249,12 @@ static int hclgevf_get_queue_info(struct hclgevf_dev *hdev)
 	memcpy(&hdev->rss_size_max, &resp_msg[2], sizeof(u16));
 	memcpy(&hdev->rx_buf_len, &resp_msg[4], sizeof(u16));
 
+	/* if irq is not enough, let tqps have the same value of irqs,
+	 * to make sure one irq just bind to one tqp, this can improve
+	 * the performance
+	 */
+	hdev->num_tqps = min(hdev->num_msi_left, hdev->num_tqps);
+
 	return 0;
 }
 
@@ -2193,7 +2199,7 @@ static int hclgevf_init_msi(struct hclgevf_dev *hdev)
 	int vectors;
 	int i;
 
-	if (hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B))
+	if (hnae3_dev_roce_supported(hdev))
 		vectors = pci_alloc_irq_vectors(pdev,
 						hdev->roce_base_msix_offset + 1,
 						hdev->num_msi,
@@ -2214,7 +2220,18 @@ static int hclgevf_init_msi(struct hclgevf_dev *hdev)
 			 hdev->num_msi, vectors);
 
 	hdev->num_msi = vectors;
+
+	/* num_msi_left means the vector number of nic.
+	 * 1. if not support RoCE, roce_base_msix_offset is 0, the num_msi_left
+	 * equals to vectors.
+	 * 2. if support RoCE, roce_base_msix_offset means the vector number of
+	 * nic, so num_msi_left equals to roce_base_msix_offset.
+	 */
 	hdev->num_msi_left = vectors;
+	if (hnae3_dev_roce_supported(hdev))
+		hdev->num_msi_left = min(hdev->num_msi_left,
+					 hdev->roce_base_msix_offset);
+
 	hdev->base_msi_vector = pdev->irq;
 	hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset;
 
@@ -2489,7 +2506,7 @@ static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev)
 
 	req = (struct hclgevf_query_res_cmd *)desc.data;
 
-	if (hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)) {
+	if (hnae3_dev_roce_supported(hdev)) {
 		hdev->roce_base_msix_offset =
 		hnae3_get_field(__le16_to_cpu(req->msixcap_localid_ba_rocee),
 				HCLGEVF_MSIX_OFT_ROCEE_M,