提交 16afc9fb 编写于 作者: K Kuninori Morimoto 提交者: Paul Mundt

sh: sh7724: Update FSI/SPU2 clock

When FSI and Network (= NFS file system) were used at the same time,
the I/O of FSI was unstable.  This patch updates the SPU2 clock (which
is used for FSI) to solve this issue.  Special thanks to Jeremy.
Signed-off-by: NJeremy Baker <Jeremy.Baker@renesas.com>
Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
上级 6f26d19f
......@@ -1105,6 +1105,11 @@ static int __init arch_setup(void)
gpio_request(GPIO_FN_FSIOBLRCK, NULL);
gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
/* set SPU2 clock to 83.4 MHz */
clk = clk_get(NULL, "spu_clk");
clk_set_rate(clk, clk_round_rate(clk, 83333333));
clk_put(clk);
/* change parent of FSI B */
clk = clk_get(NULL, "fsib_clk");
clk_register(&fsimckb_clk);
......
......@@ -586,7 +586,7 @@ arch_initcall(arch_setup);
static int __init devices_setup(void)
{
u16 sw = __raw_readw(SW4140); /* select camera, monitor */
struct clk *fsia_clk;
struct clk *clk;
/* register board specific self-refresh code */
sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
......@@ -755,13 +755,18 @@ static int __init devices_setup(void)
gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
gpio_request(GPIO_FN_FSIIASD, NULL);
/* set SPU2 clock to 83.4 MHz */
clk = clk_get(NULL, "spu_clk");
clk_set_rate(clk, clk_round_rate(clk, 83333333));
clk_put(clk);
/* change parent of FSI A */
fsia_clk = clk_get(NULL, "fsia_clk");
clk = clk_get(NULL, "fsia_clk");
clk_register(&fsimcka_clk);
clk_set_parent(fsia_clk, &fsimcka_clk);
clk_set_rate(fsia_clk, 11000);
clk_set_parent(clk, &fsimcka_clk);
clk_set_rate(clk, 11000);
clk_set_rate(&fsimcka_clk, 11000);
clk_put(fsia_clk);
clk_put(clk);
/* SDHI0 connected to cn7 */
gpio_request(GPIO_FN_SDHI0CD, NULL);
......
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