From 12c636aeae9fabb4ad8222e6227ab0b5a4b1b12f Mon Sep 17 00:00:00 2001 From: Huazhong Tan Date: Wed, 7 Aug 2019 10:23:42 +0800 Subject: [PATCH] net: hns3: fix VF interrupt clearing error for revision 0x20 driver inclusion category: bugfix bugzilla: NA CVE: NA For revision 0x21, interrupt clear register is writing 0 clear register, it means write 0 will clear the bit, write 1 make no sence. So should just write 0 to the interrupt bit, other bits keep 1. For revision 0x20, this interrupt clear register is a read & write register, for the bit has not interrupt, can not write 1, otherwise it will be 1. So this patch adds a compatible handler for revision 0x20. Fixes: a8a77dda7665 ("net: hns3: fix interrupt clearing error for VF") Feature or Bugfix:Bugfix Signed-off-by: Huazhong Tan Reviewed-by: lipeng Reviewed-by: Yunsheng Lin Reviewed-by: Yang Yingliang Signed-off-by: Yang Yingliang --- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 1e3af55a4d75..239a2d6a18e3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -1896,7 +1896,19 @@ static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, /* check for vector0 mailbox(=CMDQ RX) event source */ if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) { - *clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B); + /* for revision 0x21, clearing interrupt is writing bit 0 + * to the clear register, writing bit 1 means to keep the + * old value. + * for revision 0x20, the clear register is a read & write + * register, so we should just write 0 to the bit we are + * handling, and keep other bits as cmdq_stat_reg. + */ + if (hdev->pdev->revision >= 0x21) + *clearval = ~(1U << HCLGEVF_VECTOR0_RX_CMDQ_INT_B); + else + *clearval = cmdq_stat_reg & + ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B); + return HCLGEVF_VECTOR0_EVENT_MBX; } -- GitLab