net: hns3: modify timing of reading register in hclge_reset_wait()

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

In order to get register status earlier, this patch modifies the code
timing to read register firstly and then go to sleep to wait.
Signed-off-by: NGuangbin Huang <huangguangbin2@huawei.com>
Reviewed-by: NPeng Li <lipeng321@huawei.com>
Reviewed-by: NZhong Zhaohui <zhongzhaohui@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

@@ -3304,11 +3304,12 @@ static int hclge_reset_wait(struct hclge_dev *hdev)
 		return -EINVAL;
 	}
 
-	do {
+	val = hclge_read_dev(&hdev->hw, reg);
+	while (hnae3_get_bit(val, reg_bit) && cnt < HCLGE_RESET_WAIT_CNT) {
 		msleep(HCLGE_RESET_WATI_MS);
 		val = hclge_read_dev(&hdev->hw, reg);
 		cnt++;
-	} while (hnae3_get_bit(val, reg_bit) && cnt < HCLGE_RESET_WAIT_CNT);
+	}
 
 	if (cnt >= HCLGE_RESET_WAIT_CNT) {
 		dev_warn(&hdev->pdev->dev,