From 08871c097ea5a11c95146ba8310272571d2bbfc4 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Mon, 23 May 2011 15:53:25 +0530 Subject: [PATCH] powerpc/85xx: Add host-pci(e) bridge only for RC FSL PCIe controller can act as agent(EP) or host(RC). Under Agent(EP) mode the controller will be configured by the host system. So its not required to be registered with the PCI(e) sub-system. We only register the controller if its configured in host(RC) mode. Signed-off-by: Vivek Mahajan Signed-off-by: Prabhakar Kushwaha Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/fsl_pci.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index b4d6046deff8..80b8b7a04454 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -330,6 +330,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) struct pci_controller *hose; struct resource rsrc; const int *bus_range; + u8 progif; if (!of_device_is_available(dev)) { pr_warning("%s: disabled\n", dev->full_name); @@ -360,6 +361,18 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4, PPC_INDIRECT_TYPE_BIG_ENDIAN); + + early_read_config_byte(hose, 0, 0, PCI_CLASS_PROG, &progif); + if ((progif & 1) == 1) { + /* unmap cfg_data & cfg_addr separately if not on same page */ + if (((unsigned long)hose->cfg_data & PAGE_MASK) != + ((unsigned long)hose->cfg_addr & PAGE_MASK)) + iounmap(hose->cfg_data); + iounmap(hose->cfg_addr); + pcibios_free_controller(hose); + return 0; + } + setup_pci_cmd(hose); /* check PCI express link status */ -- GitLab