From 04284e8e20c3d1c0c9c3f831d50703c8bcbaad7a Mon Sep 17 00:00:00 2001 From: Huazhong Tan Date: Mon, 29 Apr 2019 09:37:15 +0800 Subject: [PATCH] net: hns3: fix bug about PF and VF handshake when global reset driver inclusion category: bugfix bugzilla: NA CVE: NA There will be race when there is continuous global reset. So this patch fixes it. When global reset occurs, VF set up its HCLGEVF_VF_RST_ING_BIT, PF send command to IMP to clear HCLGEVF_VF_RST_ING_BIT when PF initializes done. Feature or Bugfix:Bugfix Signed-off-by: Huazhong Tan Reviewed-by: lipeng Reviewed-by: Xie XiuQi Signed-off-by: Yang Yingliang --- .../net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 037462a8718d..9bd92b311efe 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -1331,12 +1331,9 @@ static int hclgevf_reset_wait(struct hclgevf_dev *hdev) if (hdev->reset_type == HNAE3_VF_RESET) { ret = readl_poll_timeout(hdev->hw.io_base + HCLGEVF_VF_RST_ING, val, - (val & HCLGEVF_VF_RST_ING_BIT), + !(val & HCLGEVF_VF_RST_ING_BIT), HCLGEVF_RESET_WAIT_US, HCLGEVF_RESET_WAIT_TIMEOUT_US); - val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); - hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, - val & ~HCLGEVF_VF_RST_ING_BIT); } else { ret = readl_poll_timeout(hdev->hw.io_base + HCLGEVF_RST_ING, val, @@ -1801,7 +1798,7 @@ static void hclgevf_clear_event_cause(struct hclgevf_dev *hdev, u32 regclr) static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, u32 *clearval) { - u32 cmdq_src_reg, rst_ing_reg; + u32 val, cmdq_src_reg, rst_ing_reg; /* fetch the events from their corresponding regs */ cmdq_src_reg = hclgevf_read_dev(&hdev->hw, @@ -1817,6 +1814,9 @@ static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, cmdq_src_reg &= ~BIT(HCLGEVF_VECTOR0_RST_INT_B); *clearval = cmdq_src_reg; hdev->rst_stats.vf_rst_cnt++; + val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); + hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, + val | HCLGEVF_VF_RST_ING_BIT); return HCLGEVF_VECTOR0_EVENT_RST; } -- GitLab