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    ath5k/ath9k: Fix 64 bits TSF reads · 1c0fc65e
    Benoit Papillault 提交于
    According to tests, both TSF lower and upper registers kept counting, so
    the higher part could have been updated after the lower part has been
    read, as shown in the following log where the upper part is read first
    and the lower part next.
    
    tsf = {00000003-fffffffd}
    tsf = {00000003-00000001}
    tsf = {00000004-0000000b}
    
    This patch corrects this by checking that the upper part has not been
    changed while the lower part was read. It has been tested in an IBSS
    network where artifical IBSS merges have been done in order to trigger
    hundreds of rollover for the TSF lower part.
    
    It follows the logic mentionned by Derek, with only 2 register reads
    needed at each additional steps instead of 3 (the minimum number of
    register reads is still 3).
    Signed-off-by: NBenoit Papillault <benoit.papillault@free.fr>
    Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
    1c0fc65e
pcu.c 22.4 KB