- 08 3月, 2009 27 次提交
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由 aurel32 提交于
Consistently use the C99 named initializer format for the BlockDriver methods to make the method table more readable and more easily extensible. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6768 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6767 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Fix remaining arm warnings - except for the mess in the NetWinder FP emulator. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6766 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Found while cleaning up compiler warnings: GIC_*_LEVEL macros strongly suggest that gic_irq_state.level is intended to be per-CPU and not just a single, global bit. I'm unable to test the effect, but it seems to be the most reasonable fix for the apparent brokenness. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6765 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6764 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6763 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6762 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Signed-off-by: NStefan Weil <weil@mail.berlios.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6761 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
The 970 doesn't know BAT, so let's not search BATs there. This was only in as a hack for OpenHackWare so it would work on PPC64. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6759 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6758 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Real 970 CPUs have the SLB not memory backed, but inside the CPU. This breaks bridge mode for 970 for now, but at least keeps us from overwriting physical addresses 0x0 - 0x300, rendering our interrupt handlers useless. I put in a stub for bridge mode operation that could be enabled easily, but for now it's safer to leave that off I guess (970fx doesn't have bridge mode AFAIK). Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6757 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
CPU_INTERRUPT_EXIT is not set anymore in env->interrupt_request since revision 6728. Make sure the bit is cleared on VM load. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6756 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
ctx->nx only got ORed, but never reset. So when one page in the lifetime of the VM was ever NX, all later pages were too. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6755 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
The current implementation masks some MSR bits from SRR1 as it is given on rfi(d). This looks pretty wrong and breaks Altivec. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6754 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Mtfsf can have the L bit set, so all the register contents get stored in FPSCR. Linux uses it, so let's implement it. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6753 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Real 970s enable MSR_SF on all interrupts. The current code didn't do this until now, so let's activate it! Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6752 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Linux tries to access some SPRs on PPC64 boot. Let's just ignore those for the 970fx for now to make it happy. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6751 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Linux tries to poke the AGP bridge port and is pretty sad when it can't, so let's activate the old code again and throw out the bit modifications, as we don't really do anything with the values anyways. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6750 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Linux uses tlbiel to flush TLB entries in PPC64 mode. This special TLB flush opcode only flushes an entry for the CPU it runs on, not across all CPUs in the system. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6749 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
The current SLB/PTE code does not support large pages, which are required by Linux, as it boots up with the kernel regions up as large. This patch implements large page support, so we can run Linux. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6748 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
In order to modify SLB entries on recent PPC64 machines, the slbmte instruction is used. This patch implements the slbmte instruction and makes the "bridge" mode code use the slb set functions, so we can move the SLB into the CPU struct later. This is required for Linux to run on PPC64. Signed-off-by: NAlexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6747 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6746 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6745 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Update i386-dis.c again using binutils files from CVS: include/opcode/i386.h r1.78 and opcodes/i386-dis.c r1.126. These are the last versions using GPL v2+. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6744 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6743 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6742 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6741 c046a42c-6fe2-441c-8c8c-71466251a162
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- 07 3月, 2009 13 次提交
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6740 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6739 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6738 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Fix Sparse warnings about constant truncation caused by cast git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6737 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
Fix Sparse warnings: * use NULL instead of plain 0 * rearrange header include order to avoid redefining types accidentally * ANSIfy SLIRP * avoid "restrict" keyword * add static git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6736 c046a42c-6fe2-441c-8c8c-71466251a162
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由 pbrook 提交于
and process termination in legacy applications. Try to guess which we want based on the presence of multiple threads. Also implement locking when modifying the CPU list. Signed-off-by: NPaul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6734 c046a42c-6fe2-441c-8c8c-71466251a162
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由 blueswir1 提交于
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6733 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6732 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aliguori 提交于
Major FAIL with my checkin scripts. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6731 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aliguori 提交于
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6730 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aurel32 提交于
env->interrupt_request is accessed as the bit level from both main code and signal handler, making a race condition possible even on CISC CPU. This causes freeze of QEMU under high load when running the dyntick clock. The patch below move the bit corresponding to CPU_INTERRUPT_EXIT in a separate variable, declared as volatile sig_atomic_t, so it should be work even on RISC CPU. We may want to move the cpu_interrupt(env, CPU_INTERRUPT_EXIT) case in its own function and get rid of CPU_INTERRUPT_EXIT. That can be done later, I wanted to keep the patch short for easier review. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6728 c046a42c-6fe2-441c-8c8c-71466251a162
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由 aliguori 提交于
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6727 c046a42c-6fe2-441c-8c8c-71466251a162
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