The PAPR VSCSI emulation contains a few lines of code which were once used
for debug but now do nothing at all.  This patch removes them.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

On the pseries platform, access to PCI config space is via RTAS calls(
which go to the hypervisor) rather than MMIO.  This means we don't use
the same code path as nearly everyone else which goes through pci_host.c
and we're missing some of the parameter checking along the way.

We do have some parameter checking in the RTAS calls, but it's not enough.
It checks for overruns, but does not check for unaligned accesses,
oversized accesses (which means the guest could trigger an assertion
failure from pci_host_config_{read,write}_common().  Worse it doesn't do
the basic checking for the number of RTAS arguments and results before
accessing them.

This patch fixes these bugs.

Cc: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
[AF: Fix typos spotted by mst]
Signed-off-by: NAndreas Färber <afaerber@suse.de>

machine.c is only compiled for softmmu targets, so checks for
!defined(CONFIG_USER_ONLY) are unnecessary and can be dropped.
Signed-off-by: NJuan Quintela <quintela@redhat.com>
[AF: Use more verbose commit message suggested by PMM]
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

commit f7aa5583 pulled the dcache and icache
line size initialization inside of a '#if !defined(CONFIG_USER_ONLY)' block.
This is not correct because instructions like 'dcbz' need the dcache size
initialized even for user mode.
Signed-off-by: NMeador Inge <meadori@codesourcery.com>
Cc: Varun Sethi <Varun.Sethi@freescale.com>
[AF: Simplify #ifdefs by using cache line size 32 for *-user as before]
Suggested-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

This changes nothing for other hosts.
Signed-off-by: NStefan Weil <sw@weilnetz.de>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Move code from cpu_state_reset() into ppc_cpu_reset().
Reorder #include of helper_regs.h to use it in translate_init.c.

Adjust whitespace and add braces.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>

Move code not dependent on ppc_def_t from cpu_ppc_init() into an initfn.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>

Embed CPUPPCState as first member of PowerPCCPU.
Distinguish between "powerpc-cpu", "powerpc64-cpu" and
"embedded-powerpc-cpu".

Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>

On target-ppc, our table of CPU types and features encodes the features as
found on the hardware, regardless of whether these features are actually
usable under TCG or KVM.  We already have cases where the information from
the cpu table must be fixed up to account for limitations in the emulation
method we're using.  e.g. TCG does not support the DFP and VSX instructions
and KVM needs different numbering of the CPUs in order to tell it the
correct thread to core mappings.

This patch cleans up these hacks to handle emulation limitations by
consolidating them into a pair of functions specifically for the purpose.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
[AF: Style and typo fixes, rename new functions and drop ppc_def_t arg]
Signed-off-by: NAndreas Färber <afaerber@suse.de>

It is unused, so avoid QOM'ifying it unneededly.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>

Currently the pseries machine contains not one but two somewhat ugly hacks
to allow printing of early debug messages before the guest has properly
read the device tree.

First, we special case H_PUT_TERM_CHAR so that a vtermno of 0 (usually
invalid) will look for a suitable vty and use that.  This supports Linux's
early debug code which will use H_PUT_TERM_CHAR with vtermno==0 before
reading the device tree.  Second, we support the RTAS display-character call.
This takes no vtermno so we assume the address of the default first VTY.

This patch makes things more consistent by folding the second hack into the
first.  Now, display-character uses the existing vty_lookup() function to
do the same search for a suitable VTY.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

The VIOsPAPRBus structure, used on the pseries machine contains some old
fields which are no longer used anywhere.  This patch removes them.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

This patch adds the PAPR defined RTAS system-reboot call to the pseries
machine emulation, providing the guest with a way to trigger a reboot.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

PAPR specifies a Command Response Queue (CRQ) mechanism used for virtual
IO, which we implement.  However, we don't correctly clean up registered
CRQs when we reset the system.

This patch adds a reset handler to fix this bug.  While we're at it, add
in some of the extra debug messages that were used to track the problem
down.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
[AF: Updated hcall_dprintf()s to not duplicate the function name]
Signed-off-by: NAndreas Färber <afaerber@suse.de>

The pseries machine code has a number of debug messages for debugging PAPR
hypercalls, dependent on DEBUG_SPAPR_HCALLS.  This patch cleans these
messages up a bit, by adding __func__ to the hcall_dprintf() macro and
simplifying up a number of the individual messages accordingly.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

Commit 41557447 also introduced a subtle TLB
flush bug. By applying a mask to the interrupt MSR which cleared the IR/DR
bits at the start of the interrupt handler, the logic towards the end of the
handler to force a TLB flush if either one of these bits were set would never
be triggered.

This patch simply changes the IR/DR bit check in the TLB flush logic to use
the original MSR value (albeit with some interrupt-specific bits cleared) so
that the IR/DR bits are preserved at the point where the check takes place.
Signed-off-by: NMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAndreas Färber <afaerber@suse.de>

PC speaker has been moved to target-independant code in 71093711,
so do not depend of target to include it or not.

Cc: malc <av1474@comtv.ru>
Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: NHerv? Poussineau <hpoussin@reactos.org>
Signed-off-by: Nmalc <av1474@comtv.ru>

The special target should not be needed anymore, and caused (perhaps
due to a Make bug) a failure with "make -j2".  In any case, the
main makefile is a better place for such special targets rather
than an included makefile.
Reported-by: NLuiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Tested-by: NLuiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Instruction breakpoint/zero overhead loop handling code is built into
TBs pointed to by IBREAKA/LEND SRs. When these or related SRs get
changed TBs at virtual addresses corresponding to their old and their
new values must be invalidated.

Virtual address range is passed to the tb_invalidate_phys_page_range,
which is incorrect in system emulation mode.

To fix it use guest TLB/MMU to translate virtual address to physical
address.

However the guest may not have virtual-to-physical mapping at the moment
of IBREAKA/LEND change, thus this fix is not 100% accurate.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Allow TB invalidation by its physical address, extract implementation
from the breakpoint_invalidate function.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Use uintptr_t instead of void * or unsigned long in
several op related functions, env->mem_io_pc and
GETPC() macro.
Reviewed-by: NStefan Weil <sw@weilnetz.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

The GLib threading APIs were revamped in GLib 2.31 and a number
of the old interfaces were deprecated, which means they provoke
compilation warnings (errors if -Werror) now. Add support for the
new interfaces while retaining the old ones so we can still compile
on older versions of GLib too.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

* 'xtensa' of git://jcmvbkbc.spb.ru/dumb/qemu-xtensa:
  target-xtensa: Start QOM'ifying CPU init
  target-xtensa: QOM'ify CPU reset
  target-xtensa: QOM'ify CPU
  target-xtensa: improve unit tests debugging
  target-xtensa: Move helpers.h to helper.h

* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  hw/arm_gic: Remove stray hardcoded tab
  hw/arm_gic: gic_set_pending_private() is NVIC only
  hw/arm_gic: Use NVIC instead of LEGACY_INCLUDED_GIC define
  hw/arm_gic: Make gic_reset a sysbus reset function
  hw/arm11mpcore: Convert to using sysbus GIC device
  hw/exynos4210_gic: Convert to using sysbus GIC
  hw/realview_gic: switch to sysbus GIC
  hw/a9mpcore: Switch to using sysbus GIC
  hw/a15mpcore: switch to using sysbus GIC
  hw/arm_gic: Make the GIC its own sysbus device
  hw/arm_gic: Expose PPI inputs as gpio inputs
  hw/arm_gic: Move gic_get_current_cpu into arm_gic.c
  hw/arm_gic: Move NCPU definition to arm_gic.c
  hw/exynos4210_combiner.c: Drop excessive read/write access check.
  ARM: Exynos4210: Drop gic_cpu_write() after initialization.
  Fix bit test in Exynos4210 UART emulation to use & instead of &&

Move XtensaConfig-independent code from cpu_xtensa_init() into a
QOM initfn, as a start.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>

Move code from cpu_state_reset() into QOM xtensa_cpu_reset().
To avoid moving reset_mmu() and dependencies, make it non-static.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>

Embed CPUXtensaState as first member of XtensaCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>

- add testcase announcement;
- add global symbols for individual tests;
- add host-debug-* makefile target.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>

Provides a file naming scheme consistent with other targets.
Signed-off-by: NLluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>

* stefanha/trivial-patches:
  configure: Insist on a Python 2, not Python 3
  bsd-user: fix compile failure
  ps2: avoid repeated header file includes
  make: Always set LC_ALL=C for makeinfo
  configure: Fix wrong preprocessor statement
  configure: Remove useless uses of ARCH_CFLAGS

* qemu-kvm/uq/master:
  kvmclock: guest stop notification
  kvm: update linux headers
  kvm: set gsi_bits and max_gsi correctly
  kvm: Drop unused kvm_pit_in_kernel
  kvm: allow arbitrarily sized mmio ioeventfd
  kvm: Drop redundant kvm_enabled from cpu_thread_is_idle
  kvm: add flightrecorder script

* afaerber/qom-cpu-lm32.v3:
  target-lm32: QOM'ify CPU reset
  target-lm32: QOM'ify CPU init
  target-lm32: QOM'ify CPU

Remove the single instance of a hardcoded tab from hw/arm_gic.c.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

The function gic_set_pending_private() is now used by the NVIC
only (for the GIC we now set PPI interrupts via gpio lines and
gic_set_irq()). So make it #ifdef NVIC and remove the 'attribute
unused' annotation.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Now all the A profile cores have been switched to use the standalone
sysbus GIC, the only remaining code which #includes arm_gic.c is
the v7M NVIC. The coupling is much closer here so it's not so
easily disentangled. For now, add a comment about how arm_gic.c
is compiled, and assume that the NVIC always includes arm_gic.c
and the non-NVIC GIC is always compiled standalone.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Make gic_reset a sysbus reset function, so we actually
reset the GIC on system reset rather than only at init.
For the NVIC this requires us also to implement reset
of the SysTick.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Convert arm11mpcore to using the standalone sysbus GIC device.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Convert the Exynos GIC code to use the standalone sysbus
GIC device.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NEvgeny Voevodin <e.voevodin@samsung.com>