- 23 9月, 2016 10 次提交
-
-
由 Cédric Le Goater 提交于
Configure the size of the RAM of the SOC using a property to propagate the value down to the memory controller from the board level. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Message-id: 1473438177-26079-14-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-11-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
The ast2500 eval board has a hardware strapping register value of 0xF100C2E6 which we use for a definition of AST2500_EVB_HW_STRAP1 below. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-10-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
This gives some explanation behind the magic number 0x120CE416. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-8-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
aspeed_board_init() now uses a board identifier to customize some values specific to the board. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-7-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
This is mostly a name replacement to prepare ground for other SoCs specificities. It also adds a TypeInfo struct for the palmetto-bmc board with a custom initialization for the same reason. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-6-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
We plan to add more Aspeed boards to this file. There are no changes in the code. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-5-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
Let's define an object class for each Aspeed SoC we support. A AspeedSoCInfo struct gathers the SoC specifications which can later be used by an instance of the class or by a board using the SoC. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Message-id: 1473438177-26079-4-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
This is a name replacement to prepare ground for other SoCs. Let's also remove the AST2400_SMC_BASE definition from the address space mappings, as it is not used. This controller was removed from the Aspeed SoC AST2500, so this provides us a better common base for the address space mapping on both SoCs. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-3-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Cédric Le Goater 提交于
Let's prepare for new Aspeed SoCs and rename the ast2400 file to a more generic one. There are no changes in the code apart from the header file include. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-2-git-send-email-clg@kaod.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 04 7月, 2016 1 次提交
-
-
由 Cédric Le Goater 提交于
A set of SPI flash slaves is attached under the flash controllers of the palmetto platform. "n25q256a" flash modules are used for the BMC and "mx25l25635e" for the host. These types are common in the OpenPower ecosystem. Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-id: 1467138270-32481-9-git-send-email-clg@kaod.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 27 6月, 2016 1 次提交
-
-
由 Andrew Jeffery 提交于
The magic constant configures the following options: * 28:27: Configure DRAM size as 256MB * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 * 23: Configure 24/48MHz CLKIN * 22: Disable GPIOE pass-through mode * 21: Disable GPIOD pass-through mode * 20: Enable LPC decode of SuperIO 0x2E/0x4E addresses * 19: Disable ACPI * 18: Configure 48MHz CLKIN * 17: Disable BMC 2nd boot watchdog timer * 16: Decode SuperIO address 0x2E * 15: VGA Class Code * 14: Enable LPC dedicated reset pin * 13:12: Enable SPI Master and SPI Slave to AHB Bridge * 11:10: Select CPU:AHB ratio = 2:1 * 9:8: Select 384MHz H-PLL * 7: Configure MAC#2 for RMII/NCSI * 6: Configure MAC#1 for RMII/NCSI * 5: No VGA BIOS ROM * 4: Boot using 32bit SPI address mode * 3:2: Select 16MB VGA memory * 1:0: Boot from SPI flash memory Signed-off-by: NAndrew Jeffery <andrew@aj.id.au> Reviewed-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Tested-by: NCédric Le Goater <clg@kaod.org> Message-id: 1466744305-23163-4-git-send-email-andrew@aj.id.au Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 19 5月, 2016 1 次提交
-
-
由 Paolo Bonzini 提交于
Move the inclusion out of hw/hw.h, most files do not need it. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
-
- 23 3月, 2016 2 次提交
-
-
由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
-
由 Markus Armbruster 提交于
Commit 57cb38b3 included qapi/error.h into qemu/osdep.h to get the Error typedef. Since then, we've moved to include qemu/osdep.h everywhere. Its file comment explains: "To avoid getting into possible circular include dependencies, this file should not include any other QEMU headers, with the exceptions of config-host.h, compiler.h, os-posix.h and os-win32.h, all of which are doing a similar job to this file and are under similar constraints." qapi/error.h doesn't do a similar job, and it doesn't adhere to similar constraints: it includes qapi-types.h. That's in excess of 100KiB of crap most .c files don't actually need. Add the typedef to qemu/typedefs.h, and include that instead of qapi/error.h. Include qapi/error.h in .c files that need it and don't get it now. Include qapi-types.h in qom/object.h for uint16List. Update scripts/clean-includes accordingly. Update it further to match reality: replace config.h by config-target.h, add sysemu/os-posix.h, sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h comment quoted above similarly. This reduces the number of objects depending on qapi/error.h from "all of them" to less than a third. Unfortunately, the number depending on qapi-types.h shrinks only a little. More work is needed for that one. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> [Fix compilation without the spice devel packages. - Paolo] Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
-
- 17 3月, 2016 1 次提交
-
-
由 Andrew Jeffery 提交于
The new machine is a thin layer over the AST2400 ARM926-based SoC[1]. Between the minimal machine and the current SoC implementation there is enough functionality to boot an aspeed_defconfig Linux kernel to userspace. Nothing yet is specific to the Palmetto's BMC (other than using an AST2400 SoC), but creating specific machine types is preferable to a generic machine that doesn't match any particular hardware. [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376Signed-off-by: NAndrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-5-git-send-email-andrew@aj.id.au Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-