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  1. 07 8月, 2011 1 次提交
  3. 27 6月, 2011 1 次提交
  5. 04 3月, 2011 1 次提交
    • A
      target-sh4: move intr_at_halt out of cpu_halted() · efac4154
      由 Aurelien Jarno 提交于 
      All targets except SH4 have the same cpu_halted() routine, and it has
only one caller. It is therefore a good candidate for inlining.

The difference is the handling of the intr_at_halt, which is necessary
to ignore SR.BL when sleeping. Move intr_at_halt handling out of it, by
setting this variable while executing the sleep instruction, and
clearing it when the CPU has been woken-up by an interrupt, whatever the
state of SR.BL. Also rename this variable in_sleep.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      efac4154
  7. 26 1月, 2011 3 次提交
  9. 25 1月, 2011 2 次提交
  11. 15 1月, 2011 1 次提交
  13. 10 1月, 2011 2 次提交
    • A
      target-sh4: improve TLB · 829a4927
      由 Aurelien Jarno 提交于 
      SH4 is using 16-bit instructions which means most of the constants are
loaded through a constant pool at the end of the subroutine. The same
memory page is therefore accessed in exec and read mode.

With the current implementation, a QEMU TLB entry is set to read or
read/write mode after an UTLB search and to exec mode after an ITLB
search, which causes a lot of TLB exceptions to switch from read or
read/write to exec and vice versa.

This patch optimizes that by already setting the QEMU TLB entry in read
or read/write mode when an UTLB entry is copied into ITLB (during an
ITLB miss). This improve the emulation speed by about 14%.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      829a4927
    • A
      target-sh4: implement writes to mmaped ITLB · c0f809c4
      由 Aurelien Jarno 提交于 
      Some Linux kernels seems to implement ITLB/UTLB flushing through by
writing all TLB entries through the memory mapped interface instead
of writing one to MMUCR.TI.

Implement memory mapped ITLB write interface so that such kernels can
boot. This fixes https://bugs.launchpad.net/bugs/700774 .
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      c0f809c4
  15. 19 3月, 2010 1 次提交
  17. 17 3月, 2010 1 次提交
    • P
      Large page TLB flush · d4c430a8
      由 Paul Brook 提交于 
      QEMU uses a fixed page size for the CPU TLB.  If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.

When the guest invalidates the TLB by virtual address we must invalidate
all entries covered by the large page.  However the address used to
invalidate the entry may not be present in the QEMU TLB, so we do not
know which regions to clear.

Implementing a full vaiable size TLB is hard and slow, so just keep a
simple address/mask pair to record which addresses may have been mapped by
large pages.  If the guest invalidates this region then flush the
whole TLB.
Signed-off-by: NPaul Brook <paul@codesourcery.com>
      d4c430a8
  19. 13 3月, 2010 1 次提交
  21. 14 2月, 2010 1 次提交
  23. 10 2月, 2010 7 次提交
  25. 02 10月, 2009 2 次提交
  27. 17 7月, 2009 1 次提交
  29. 14 5月, 2009 1 次提交
  31. 03 4月, 2009 2 次提交
  33. 02 4月, 2009 1 次提交
    • E
      SH: Improve movca.l/ocbi emulation. · 852d481f
      由 edgar_igl 提交于 
      Author: Vladimir Prus <vladimir@codesourcery.com>

    Fix movcal.l/ocbi emulation.

        * target-sh4/cpu.h (memory_content): New.
        (CPUSH4State): New fields movcal_backup and movcal_backup_tail.
        * target-sh4/helper.h (helper_movcal)
        (helper_discard_movcal_backup, helper_ocbi): New.
        * target-sh4/op_helper.c (helper_movcal)
        (helper_discard_movcal_backup, helper_ocbi): New.
        * target-sh4/translate.c (DisasContext): New field has_movcal.
        (sh4_defs): Update CVS for SH7785.
        (cpu_sh4_init): Initialize env->movcal_backup_tail.
        (_decode_opc): Discard movca.l-backup.
        Make use of helper_movcal and helper_ocbi.
        (gen_intermediate_code_internal): Initialize has_movcal to 1.

Thanks to Shin-ichiro KAWASAKI and Paul Mundt for valuable feedback.
Acked-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6966 c046a42c-6fe2-441c-8c8c-71466251a162
      852d481f
  35. 03 3月, 2009 4 次提交
  37. 16 1月, 2009 2 次提交
  39. 05 1月, 2009 1 次提交
  41. 11 12月, 2008 1 次提交
  43. 08 12月, 2008 2 次提交
  45. 22 11月, 2008 1 次提交