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  1. 07 8月, 2011 1 次提交
  3. 27 6月, 2011 1 次提交
  5. 04 3月, 2011 1 次提交
    • A
      target-sh4: move intr_at_halt out of cpu_halted() · efac4154
      由 Aurelien Jarno 提交于 
      All targets except SH4 have the same cpu_halted() routine, and it has
only one caller. It is therefore a good candidate for inlining.

The difference is the handling of the intr_at_halt, which is necessary
to ignore SR.BL when sleeping. Move intr_at_halt handling out of it, by
setting this variable while executing the sleep instruction, and
clearing it when the CPU has been woken-up by an interrupt, whatever the
state of SR.BL. Also rename this variable in_sleep.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      efac4154
  7. 26 1月, 2011 2 次提交
  9. 15 1月, 2011 2 次提交
  11. 10 1月, 2011 1 次提交
  13. 30 10月, 2010 1 次提交
  15. 03 7月, 2010 2 次提交
  17. 13 3月, 2010 2 次提交
  19. 10 2月, 2010 2 次提交
  21. 02 10月, 2009 2 次提交
  23. 24 8月, 2009 1 次提交
    • N
      cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal · 0b5c1ce8
      由 Nathan Froyd 提交于 
      handle_cpu_signal is very nearly copy-paste code for each target, with a
few minor variations.  This patch sets up appropriate defaults for a
generic handle_cpu_signal and provides overrides for particular targets
that did things differently.  Fixing things like the persistent (XXX:
use sigsetjmp) should now become somewhat easier.

Previous comments on this patch suggest that the "activate soft MMU for
this block" comments refer to defunct functionality.  I have removed
such blocks for the appropriate targets in this patch.
Signed-off-by: NNathan Froyd <froydnj@codesourcery.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      0b5c1ce8
  25. 17 7月, 2009 1 次提交
  27. 02 4月, 2009 1 次提交
    • E
      SH: Improve movca.l/ocbi emulation. · 852d481f
      由 edgar_igl 提交于 
      Author: Vladimir Prus <vladimir@codesourcery.com>

    Fix movcal.l/ocbi emulation.

        * target-sh4/cpu.h (memory_content): New.
        (CPUSH4State): New fields movcal_backup and movcal_backup_tail.
        * target-sh4/helper.h (helper_movcal)
        (helper_discard_movcal_backup, helper_ocbi): New.
        * target-sh4/op_helper.c (helper_movcal)
        (helper_discard_movcal_backup, helper_ocbi): New.
        * target-sh4/translate.c (DisasContext): New field has_movcal.
        (sh4_defs): Update CVS for SH7785.
        (cpu_sh4_init): Initialize env->movcal_backup_tail.
        (_decode_opc): Discard movca.l-backup.
        Make use of helper_movcal and helper_ocbi.
        (gen_intermediate_code_internal): Initialize has_movcal to 1.

Thanks to Shin-ichiro KAWASAKI and Paul Mundt for valuable feedback.
Acked-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6966 c046a42c-6fe2-441c-8c8c-71466251a162
      852d481f
  29. 07 3月, 2009 1 次提交
  31. 03 3月, 2009 2 次提交
  33. 07 2月, 2009 1 次提交
  35. 05 1月, 2009 1 次提交
  37. 14 12月, 2008 3 次提交
  39. 12 12月, 2008 1 次提交
  41. 08 12月, 2008 1 次提交
    • A
      SH4: Implement FD bit · d8299bcc
      由 aurel32 提交于 
      SH4 manual say that if a floating point instruction is executed while
FD bit in the status register is 1, an exception should be raised. QEMU
presently does not do that, so the kernel does not initialize FP state
for any thread, nor does it save/restore FP state. The most apparent
consequence is that while recent gcc/libc expect double-precision mode
to be set by kernel, they run in single-precision mode, and all FP code
produces wrong values.

This patch fixes this. It also fixes a couple of places where PC was
not updated before handling an exception, although both those places
deal with invalid instruction and don't lead to any user-visible bugs.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5937 c046a42c-6fe2-441c-8c8c-71466251a162
      d8299bcc
  43. 19 11月, 2008 2 次提交
  45. 15 9月, 2008 1 次提交
  47. 03 9月, 2008 1 次提交
    • A
      sh4: CPU versioning. · 0fd3ca30
      由 aurel32 提交于 
      Trivial patch adding CPU listing and the ability to do per-subtype
CVR/PVR/PRR values. Presently SH7750R and SH7751R definitions are
provided, as these are the ones in present use in-tree.

The CVR value for SH7751R is intentionally restricted so the kernel
boots, though this will want to be switched to the proper CVR value
once system emulation has sufficiently stabilized.

This also makes it trivial to abstract subtype specific registers like
MMU_PTEA and to set up feature bits in line with the kernel probing for
things like conditionalizing FPU/DSP context.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5133 c046a42c-6fe2-441c-8c8c-71466251a162
      0fd3ca30
  49. 02 9月, 2008 1 次提交
  51. 22 8月, 2008 2 次提交
  53. 02 7月, 2008 1 次提交
  55. 29 6月, 2008 1 次提交
  57. 31 5月, 2008 1 次提交