1. 17 12月, 2010 1 次提交
  2. 27 11月, 2010 5 次提交
  3. 01 10月, 2010 1 次提交
  4. 03 7月, 2010 1 次提交
  5. 30 6月, 2010 2 次提交
  6. 22 5月, 2010 2 次提交
  7. 18 5月, 2010 1 次提交
  8. 18 4月, 2010 1 次提交
  9. 14 4月, 2010 1 次提交
    • A
      sh_pci: fix memory and I/O access · 5ba9e952
      Aurelien Jarno 提交于
      Since commit 8da3ff18 ("MMIO callback
      interface changes"), the addresses passed to the I/O functions are an
      offset to the start of the area. As a consequence, there is no need to
      correct the address using the value of IOBR. This make possible the use
      of the default MMIO functions. Moreover the addresses are now remaped
      when the value if IOBR change.
      
      The memory area corresponds to the devices behing the PCI bus, it should
      not be mapped by the PCI controller. Remove the corresponding code.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      5ba9e952
  10. 11 4月, 2010 1 次提交
  11. 06 4月, 2010 1 次提交
  12. 31 3月, 2010 1 次提交
  13. 30 3月, 2010 6 次提交
  14. 28 3月, 2010 1 次提交
  15. 27 3月, 2010 3 次提交
  16. 23 3月, 2010 1 次提交
  17. 22 3月, 2010 10 次提交
  18. 07 3月, 2010 1 次提交