1. 06 1月, 2011 8 次提交
  2. 05 1月, 2011 3 次提交
    • E
      microblaze: Use more TB chaining · 23979dc5
      Edgar E. Iglesias 提交于
      For some workloads with tight loops this ~doubles the emulation
      speed.
      Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@petalogix.com>
      23979dc5
    • A
      cirrus_vga: fix division by 0 for color expansion rop · 92d675d1
      Aurelien Jarno 提交于
      Commit d85d0d38 introduces a regression
      with Windows ME that leads to a division by 0 and a crash.
      
      It uses the color expansion rop with the source pitch set to 0. This is
      something allowed, as the manual explicitely says "When the source of
      color-expand data is display memory, the source pitch is ignored.".
      
      This patch fixes this regression by computing sx, sy and others
      variables only if they are going to be used later, that is for a plain
      copy ROP. It basically consists in moving code.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      92d675d1
    • A
      Fix curses on big endian hosts · 9ae19b65
      Aurelien Jarno 提交于
      On big endian hosts, the curses interface is unusable: the emulated
      graphic card only displays garbage, while the monitor interface displays
      nothing (or rather only spaces).
      
      The curses interface is waiting for data in native endianness, so
      console_write_ch() should not do any conversion. The conversion should
      be done when reading the video buffer in hw/vga.c. I supposed this
      buffer is in little endian mode, though it's not impossible that the
      data is actually in guest endianness. I currently have no big endian
      guest to way (they all switch to graphic mode immediately).
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      9ae19b65
  3. 04 1月, 2011 1 次提交
  4. 03 1月, 2011 2 次提交
  5. 02 1月, 2011 1 次提交
  6. 01 1月, 2011 3 次提交
  7. 29 12月, 2010 1 次提交
  8. 28 12月, 2010 13 次提交
  9. 27 12月, 2010 1 次提交
    • A
      target-mips: fix host CPU consumption when guest is idle · 4cdc1cd1
      Aurelien Jarno 提交于
      When the CPU is in wait state, do not wake-up if an interrupt can't be
      taken. This avoid host CPU running at 100% if a device (e.g. timer) has
      an interrupt line left enabled.
      
      Also factorize code to check if interrupts are enabled in
      cpu_mips_hw_interrupts_pending().
      
      Based on a patch from Edgar E. Iglesias <edgar.iglesias@gmail.com>
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> 
      4cdc1cd1
  10. 26 12月, 2010 1 次提交
  11. 22 12月, 2010 6 次提交