From f62cafd4c87fad7bb9b9544b4cf4991d34764b11 Mon Sep 17 00:00:00 2001 From: Sebastian Ottlik Date: Tue, 10 Sep 2013 19:09:32 +0100 Subject: [PATCH] target-arm: fix ARMv7M stack alignment on reset When the initial SP is loaded from the vector table on ARMv7M systems the two least significant bits are ignored as the stack is always aligned at a four byte boundary (see ARM DDI 0403C, B1.4.1 and B1.5.5). So far QEMU did not ignore these bits leading to a stack alignment inconsitent with real hardware for binaries that rely on this behaviour. This patch fixes this issue by masking the two least significant bits when loading the SP. Signed-off-by: Sebastian Ottlik Reviewed-by: Peter Maydell Message-id: 1378286595-27072-1-git-send-email-ottlik@fzi.de Signed-off-by: Peter Maydell --- target-arm/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 827e28ee4d..09206b5971 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -108,7 +108,7 @@ static void arm_cpu_reset(CPUState *s) modified flash and reset itself. However images loaded via -kernel have not been copied yet, so load the values directly from there. */ - env->regs[13] = ldl_p(rom); + env->regs[13] = ldl_p(rom) & 0xFFFFFFFC; pc = ldl_p(rom + 4); env->thumb = pc & 1; env->regs[15] = pc & ~1; -- GitLab