diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 0dcf612258a843243fe2b3115526a7573b478f21..7dfb17f2cf7a402349bffef6aef1f5caeb19bbbd 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -1339,6 +1339,13 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, tcg_out_qemu_st(s, args, 3); break; + case INDEX_op_ext8s_i32: + tcg_out32 (s, EXTSB | RS (args[1]) | RA (args[0])); + break; + case INDEX_op_ext16s_i32: + tcg_out32 (s, EXTSH | RS (args[1]) | RA (args[0])); + break; + default: tcg_dump_ops (s, stderr); tcg_abort (); @@ -1415,6 +1422,9 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_qemu_st64, { "M", "M", "M", "M" } }, #endif + { INDEX_op_ext8s_i32, { "r", "r" } }, + { INDEX_op_ext16s_i32, { "r", "r" } }, + { -1 }, }; diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index db1b12170d3180e22a82bd934b3857691c739131..e21b9926da4af358315c12262b7b36c5e19b1f35 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -71,6 +71,8 @@ enum { /* optional instructions */ #define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_div_i32 +#define TCG_TARGET_HAS_ext8s_i32 +#define TCG_TARGET_HAS_ext16s_i32 #define TCG_AREG0 TCG_REG_R27 #define TCG_AREG1 TCG_REG_R24 diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index a2b6aad5ef021930b484aa07ab965935d915236a..0967b95d5b8d649b7ea5d22a169c6f8284fa0dc2 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -969,6 +969,8 @@ void ppc_tb_set_jmp_target (unsigned long jmp_addr, unsigned long addr) static void tcg_out_op (TCGContext *s, int opc, const TCGArg *args, const int *const_args) { + int c; + switch (opc) { case INDEX_op_exit_tb: tcg_out_movi (s, TCG_TYPE_I64, TCG_REG_R3, args[0]); @@ -1313,6 +1315,21 @@ static void tcg_out_op (TCGContext *s, int opc, const TCGArg *args, tcg_out_qemu_st (s, args, 3); break; + case INDEX_op_ext8s_i32: + case INDEX_op_ext8s_i64: + c = EXTSB; + goto gen_ext; + case INDEX_op_ext16s_i32: + case INDEX_op_ext16s_i64: + c = EXTSH; + goto gen_ext; + case INDEX_op_ext32s_i64: + c = EXTSW; + goto gen_ext; + gen_ext: + tcg_out32 (s, c | RS (args[1]) | RA (args[0])); + break; + default: tcg_dump_ops (s, stderr); tcg_abort (); @@ -1404,6 +1421,12 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_qemu_st32, { "K", "K" } }, { INDEX_op_qemu_st64, { "M", "M", "M" } }, + { INDEX_op_ext8s_i32, { "r", "r" } }, + { INDEX_op_ext16s_i32, { "r", "r" } }, + { INDEX_op_ext8s_i64, { "r", "r" } }, + { INDEX_op_ext16s_i64, { "r", "r" } }, + { INDEX_op_ext32s_i64, { "r", "r" } }, + { -1 }, }; diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h index 98d66cd92e1f1e94e2550ee16ff793ab443fbdfd..66feb4d5af1254df20f9a1d4ff5b091743bac62e 100644 --- a/tcg/ppc64/tcg-target.h +++ b/tcg/ppc64/tcg-target.h @@ -72,6 +72,11 @@ enum { #define TCG_TARGET_HAS_div_i32 #define TCG_TARGET_HAS_neg_i64 #define TCG_TARGET_HAS_div_i64 +#define TCG_TARGET_HAS_ext8s_i32 +#define TCG_TARGET_HAS_ext16s_i32 +#define TCG_TARGET_HAS_ext8s_i64 +#define TCG_TARGET_HAS_ext16s_i64 +#define TCG_TARGET_HAS_ext32s_i64 #define TCG_AREG0 TCG_REG_R27 #define TCG_AREG1 TCG_REG_R24