target-ppc: convert crf related instructions to TCG

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5505 c046a42c-6fe2-441c-8c8c-71466251a162

target-ppc/cpu.h

@@ -829,7 +829,13 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
 #include "cpu-all.h"
 
 /*****************************************************************************/
-/* Registers definitions */
+/* CRF definitions */
+#define CRF_LT  3
+#define CRF_GT  2
+#define CRF_EQ  1
+#define CRF_SO  0
+
+/* XER definitions */
 #define XER_SO  31
 #define XER_OV  30
 #define XER_CA  29

target-ppc/helper.h

@@ -2,3 +2,8 @@
 #define DEF_HELPER(ret, name, params) ret name params;
 #endif
 
+DEF_HELPER(uint32_t, helper_fcmpo, (void))
+DEF_HELPER(uint32_t, helper_fcmpu, (void))
+
+DEF_HELPER(uint32_t, helper_load_cr, (void))
+DEF_HELPER(void, helper_store_cr, (target_ulong, uint32_t))

target-ppc/op.c

@@ -26,14 +26,6 @@
 #include "helper_regs.h"
 #include "op_helper.h"
 
-/* PowerPC state maintenance operations */
-/* set_Rc0 */
-void OPPROTO op_set_Rc0 (void)
-{
-    env->crf[0] = T0 | xer_so;
-    RETURN();
-}
-
 /* Generate exceptions */
 void OPPROTO op_raise_exception_err (void)
 {
@@ -46,18 +38,6 @@ void OPPROTO op_debug (void)
 }
 
 /* Load/store special registers */
-void OPPROTO op_load_cr (void)
-{
-    do_load_cr();
-    RETURN();
-}
-
-void OPPROTO op_store_cr (void)
-{
-    do_store_cr(PARAM1);
-    RETURN();
-}
-
 #if defined(TARGET_PPC64)
 void OPPROTO op_store_pri (void)
 {
@@ -337,18 +317,6 @@ void OPPROTO op_load_fpscr_FT0 (void)
     RETURN();
 }
 
-void OPPROTO op_load_fpscr_T0 (void)
-{
-    T0 = (env->fpscr >> PARAM1) & 0xF;
-    RETURN();
-}
-
-void OPPROTO op_load_fpcc (void)
-{
-    T0 = fpscr_fpcc;
-    RETURN();
-}
-
 void OPPROTO op_fpscr_resetbit (void)
 {
     env->fpscr &= PARAM1;
@@ -953,132 +921,6 @@ void OPPROTO op_subfzeo_64 (void)
 }
 #endif
 
-/***                           Integer comparison                          ***/
-/* compare */
-void OPPROTO op_cmp (void)
-{
-    if ((int32_t)T0 < (int32_t)T1) {
-        T0 = 0x08;
-    } else if ((int32_t)T0 > (int32_t)T1) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO op_cmp_64 (void)
-{
-    if ((int64_t)T0 < (int64_t)T1) {
-        T0 = 0x08;
-    } else if ((int64_t)T0 > (int64_t)T1) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-#endif
-
-/* compare immediate */
-void OPPROTO op_cmpi (void)
-{
-    if ((int32_t)T0 < (int32_t)PARAM1) {
-        T0 = 0x08;
-    } else if ((int32_t)T0 > (int32_t)PARAM1) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO op_cmpi_64 (void)
-{
-    if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) {
-        T0 = 0x08;
-    } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-#endif
-
-/* compare logical */
-void OPPROTO op_cmpl (void)
-{
-    if ((uint32_t)T0 < (uint32_t)T1) {
-        T0 = 0x08;
-    } else if ((uint32_t)T0 > (uint32_t)T1) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO op_cmpl_64 (void)
-{
-    if ((uint64_t)T0 < (uint64_t)T1) {
-        T0 = 0x08;
-    } else if ((uint64_t)T0 > (uint64_t)T1) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-#endif
-
-/* compare logical immediate */
-void OPPROTO op_cmpli (void)
-{
-    if ((uint32_t)T0 < (uint32_t)PARAM1) {
-        T0 = 0x08;
-    } else if ((uint32_t)T0 > (uint32_t)PARAM1) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO op_cmpli_64 (void)
-{
-    if ((uint64_t)T0 < (uint64_t)PARAM1) {
-        T0 = 0x08;
-    } else if ((uint64_t)T0 > (uint64_t)PARAM1) {
-        T0 = 0x04;
-    } else {
-        T0 = 0x02;
-    }
-    T0 |= xer_so;
-    RETURN();
-}
-#endif
-
-void OPPROTO op_isel (void)
-{
-    if (T0)
-        T0 = T1;
-    else
-        T0 = T2;
-    RETURN();
-}
-
 void OPPROTO op_popcntb (void)
 {
     do_popcntb();
@@ -1339,12 +1181,6 @@ void OPPROTO op_sli_T0 (void)
     RETURN();
 }
 
-void OPPROTO op_sli_T1 (void)
-{
-    T1 = T1 << PARAM1;
-    RETURN();
-}
-
 void OPPROTO op_srl_T0_T1 (void)
 {
     T0 = (uint32_t)T0 >> T1;
@@ -1579,21 +1415,6 @@ void OPPROTO op_frim (void)
     RETURN();
 }
 
-/***                         Floating-Point compare                        ***/
-/* fcmpu */
-void OPPROTO op_fcmpu (void)
-{
-    do_fcmpu();
-    RETURN();
-}
-
-/* fcmpo */
-void OPPROTO op_fcmpo (void)
-{
-    do_fcmpo();
-    RETURN();
-}
-
 /***                         Floating-point move                           ***/
 /* fabs */
 void OPPROTO op_fabs (void)

target-ppc/op_helper.c

@@ -62,25 +62,25 @@ void do_raise_exception (uint32_t exception)
 
 /*****************************************************************************/
 /* Registers load and stores */
-void do_load_cr (void)
+uint32_t helper_load_cr (void)
 {
-    T0 = (env->crf[0] << 28) |
-        (env->crf[1] << 24) |
-        (env->crf[2] << 20) |
-        (env->crf[3] << 16) |
-        (env->crf[4] << 12) |
-        (env->crf[5] << 8) |
-        (env->crf[6] << 4) |
-        (env->crf[7] << 0);
+    return (env->crf[0] << 28) |
+           (env->crf[1] << 24) |
+           (env->crf[2] << 20) |
+           (env->crf[3] << 16) |
+           (env->crf[4] << 12) |
+           (env->crf[5] << 8) |
+           (env->crf[6] << 4) |
+           (env->crf[7] << 0);
 }
 
-void do_store_cr (uint32_t mask)
+void helper_store_cr (target_ulong val, uint32_t mask)
 {
     int i, sh;
 
     for (i = 0, sh = 7; i < 8; i++, sh--) {
         if (mask & (1 << sh))
-            env->crf[i] = (T0 >> (sh * 4)) & 0xFUL;
+            env->crf[i] = (val >> (sh * 4)) & 0xFUL;
     }
 }
 
@@ -1364,27 +1364,32 @@ void do_fsel (void)
         FT0 = FT2;
 }
 
-void do_fcmpu (void)
+uint32_t helper_fcmpu (void)
 {
+    uint32_t ret = 0;
+
     if (unlikely(float64_is_signaling_nan(FT0) ||
                  float64_is_signaling_nan(FT1))) {
         /* sNaN comparison */
         fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
     } else {
         if (float64_lt(FT0, FT1, &env->fp_status)) {
-            T0 = 0x08UL;
+            ret = 0x08UL;
         } else if (!float64_le(FT0, FT1, &env->fp_status)) {
-            T0 = 0x04UL;
+            ret = 0x04UL;
         } else {
-            T0 = 0x02UL;
+            ret = 0x02UL;
         }
     }
     env->fpscr &= ~(0x0F << FPSCR_FPRF);
-    env->fpscr |= T0 << FPSCR_FPRF;
+    env->fpscr |= ret << FPSCR_FPRF;
+    return ret;
 }
 
-void do_fcmpo (void)
+uint32_t helper_fcmpo (void)
 {
+    uint32_t ret = 0;
+
     if (unlikely(float64_is_nan(FT0) ||
                  float64_is_nan(FT1))) {
         if (float64_is_signaling_nan(FT0) ||
@@ -1398,15 +1403,16 @@ void do_fcmpo (void)
         }
     } else {
         if (float64_lt(FT0, FT1, &env->fp_status)) {
-            T0 = 0x08UL;
+            ret = 0x08UL;
         } else if (!float64_le(FT0, FT1, &env->fp_status)) {
-            T0 = 0x04UL;
+            ret = 0x04UL;
         } else {
-            T0 = 0x02UL;
+            ret = 0x02UL;
         }
     }
     env->fpscr &= ~(0x0F << FPSCR_FPRF);
-    env->fpscr |= T0 << FPSCR_FPRF;
+    env->fpscr |= ret << FPSCR_FPRF;
+    return ret;
 }
 
 #if !defined (CONFIG_USER_ONLY)