diff --git a/hw/lm32_sys.c b/hw/lm32_sys.c index 427b05fe1a31cf1f358dc41680d89bbb07678f47..e5ff962f4362a223522ce74e73578a872e3321ff 100644 --- a/hw/lm32_sys.c +++ b/hw/lm32_sys.c @@ -83,7 +83,7 @@ static void sys_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("lm32_sys: write access to unkown register 0x" + error_report("lm32_sys: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/lm32_timer.c b/hw/lm32_timer.c index ed289847ac417e93c3935504ce957d592b1f9a8e..49cbb22993ca27efd728b8cb47133fd99d63dc5c 100644 --- a/hw/lm32_timer.c +++ b/hw/lm32_timer.c @@ -86,7 +86,7 @@ static uint32_t timer_read(void *opaque, target_phys_addr_t addr) r = (uint32_t)ptimer_get_count(s->ptimer); break; default: - error_report("lm32_timer: read access to unkown register 0x" + error_report("lm32_timer: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -124,7 +124,7 @@ static void timer_write(void *opaque, target_phys_addr_t addr, uint32_t value) TARGET_FMT_plx, addr << 2); break; default: - error_report("lm32_timer: write access to unkown register 0x" + error_report("lm32_timer: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/lm32_uart.c b/hw/lm32_uart.c index e225087b99b5c0dc54fe1728c5190be0ddaff4eb..09090e93b2108e32255d334cac81426c81e7c166 100644 --- a/hw/lm32_uart.c +++ b/hw/lm32_uart.c @@ -149,7 +149,7 @@ static uint32_t uart_read(void *opaque, target_phys_addr_t addr) TARGET_FMT_plx, addr << 2); break; default: - error_report("lm32_uart: read access to unkown register 0x" + error_report("lm32_uart: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -185,7 +185,7 @@ static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value) TARGET_FMT_plx, addr << 2); break; default: - error_report("lm32_uart: write access to unkown register 0x" + error_report("lm32_uart: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/milkymist-ac97.c b/hw/milkymist-ac97.c index 6c9e318aa2cb1239ee35588a63dc826888ba4c47..6104732f7d12f486873b814ddb3bd9600df0bcdd 100644 --- a/hw/milkymist-ac97.c +++ b/hw/milkymist-ac97.c @@ -103,7 +103,7 @@ static uint32_t ac97_read(void *opaque, target_phys_addr_t addr) break; default: - error_report("milkymist_ac97: read access to unkown register 0x" + error_report("milkymist_ac97: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -152,7 +152,7 @@ static void ac97_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("milkymist_ac97: write access to unkown register 0x" + error_report("milkymist_ac97: write access to unknown register 0x" TARGET_FMT_plx, addr); break; } diff --git a/hw/milkymist-memcard.c b/hw/milkymist-memcard.c index 06077af82a43a84502abcf93fff278698b163871..22dc377d79a7f7fb45d3e1a8e85dc7efa3c3ff96 100644 --- a/hw/milkymist-memcard.c +++ b/hw/milkymist-memcard.c @@ -154,7 +154,7 @@ static uint32_t memcard_read(void *opaque, target_phys_addr_t addr) break; default: - error_report("milkymist_memcard: read access to unkown register 0x" + error_report("milkymist_memcard: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -210,7 +210,7 @@ static void memcard_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("milkymist_memcard: write access to unkown register 0x" + error_report("milkymist_memcard: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/milkymist-sysctl.c b/hw/milkymist-sysctl.c index 6bd0cb97405a5312cbc04e24a2e54ef41b1ec719..7b2d544ac35d67e46e50f090d5c4606279cb9e95 100644 --- a/hw/milkymist-sysctl.c +++ b/hw/milkymist-sysctl.c @@ -119,7 +119,7 @@ static uint32_t sysctl_read(void *opaque, target_phys_addr_t addr) break; default: - error_report("milkymist_sysctl: read access to unkown register 0x" + error_report("milkymist_sysctl: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -189,7 +189,7 @@ static void sysctl_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("milkymist_sysctl: write access to unkown register 0x" + error_report("milkymist_sysctl: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; }