diff --git a/audio/mixeng.c b/audio/mixeng.c index 981b97a96485fd2460c29ebe1a7d6fc5951b26e6..61ef8691a3ce2d09484bd4fef8e6e37e3c6abd07 100644 --- a/audio/mixeng.c +++ b/audio/mixeng.c @@ -270,7 +270,7 @@ f_sample *mixeng_clip[2][2][2][3] = { * August 21, 1998 * Copyright 1998 Fabrice Bellard. * - * [Rewrote completly the code of Lance Norskog And Sundry + * [Rewrote completely the code of Lance Norskog And Sundry * Contributors with a more efficient algorithm.] * * This source code is freely redistributable and may be used for diff --git a/audio/ossaudio.c b/audio/ossaudio.c index 349e9dd53de86b83130496dec56ad251834c7662..a0d9cda1ec5cd7f3a2846e7bd4ce2effc949ac18 100644 --- a/audio/ossaudio.c +++ b/audio/ossaudio.c @@ -898,7 +898,7 @@ static struct audio_option oss_options[] = { .name = "EXCLUSIVE", .tag = AUD_OPT_BOOL, .valp = &glob_conf.exclusive, - .descr = "Open device in exclusive mode (vmix wont work)" + .descr = "Open device in exclusive mode (vmix won't work)" }, #ifdef USE_DSP_POLICY { diff --git a/contrib/ivshmem-server/ivshmem-server.h b/contrib/ivshmem-server/ivshmem-server.h index 385163961845cc12e9928dff9f3d1839f6f288a2..d37ca85265bd79a72be9f84c5fa081c4436e3f21 100644 --- a/contrib/ivshmem-server/ivshmem-server.h +++ b/contrib/ivshmem-server/ivshmem-server.h @@ -15,7 +15,7 @@ * unix socket. For each client, the server will create some eventfd * (see EVENTFD(2)), one per vector. These fd are transmitted to all * clients using the SCM_RIGHTS cmsg message. Therefore, each client is - * able to send a notification to another client without beeing + * able to send a notification to another client without being * "profixied" by the server. * * We use this mechanism to send interruptions between guests. diff --git a/docs/specs/rocker.txt b/docs/specs/rocker.txt index d2a82624f46786c2bb2712cad1de415e0b5f14a5..1857b317030d7eaad7a47c1372dfe9c4a2342614 100644 --- a/docs/specs/rocker.txt +++ b/docs/specs/rocker.txt @@ -303,7 +303,7 @@ Endianness ---------- Device registers are hard-coded to little-endian (LE). The driver should -convert to/from host endianess to LE for device register accesses. +convert to/from host endianness to LE for device register accesses. Descriptors are LE. Descriptor buffer TLVs will have LE type and length fields, but the value field can either be LE or network-byte-order, depending diff --git a/docs/throttle.txt b/docs/throttle.txt index 28204e46cace718a339f500a3ab01814fb1bb9ee..06ed9b3943fdd1fbef53b10faa61897bb7f252ec 100644 --- a/docs/throttle.txt +++ b/docs/throttle.txt @@ -10,7 +10,7 @@ Introduction ------------ QEMU includes a throttling module that can be used to set limits to I/O operations. The code itself is generic and independent of the I/O -units, but it is currenly used to limit the number of bytes per second +units, but it is currently used to limit the number of bytes per second and operations per second (IOPS) when performing disk I/O. This document explains how to use the throttling code in QEMU, and how diff --git a/hw/i2c/imx_i2c.c b/hw/i2c/imx_i2c.c index a01e43ebebbe433194a142032ccc4a150053327a..e19d4fa7459dd8d0a0d89786515b5cedc254735c 100644 --- a/hw/i2c/imx_i2c.c +++ b/hw/i2c/imx_i2c.c @@ -247,7 +247,7 @@ static void imx_i2c_write(void *opaque, hwaddr offset, if (s->address == ADDR_RESET) { if (i2c_start_transfer(s->bus, extract32(s->i2dr_write, 1, 7), extract32(s->i2dr_write, 0, 1))) { - /* if non zero is returned, the adress is not valid */ + /* if non zero is returned, the address is not valid */ s->i2sr |= I2SR_RXAK; } else { s->address = s->i2dr_write; diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index 093a71e12e3dbf0deb368bfd3c1f53fcaeb34f5b..20f26b7d8982671fcb82ffa41867465ccd2e19cd 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -37,7 +37,7 @@ #define VMXNET3_MSIX_BAR_SIZE 0x2000 #define MIN_BUF_SIZE 60 -/* Compatability flags for migration */ +/* Compatibility flags for migration */ #define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0 #define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \ (1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT) @@ -341,7 +341,7 @@ typedef struct { uint32_t mcast_list_len; uint32_t mcast_list_buff_size; /* needed for live migration. */ - /* Compatability flags for migration */ + /* Compatibility flags for migration */ uint32_t compat_flags; } VMXNET3State; diff --git a/hw/pci/msi.c b/hw/pci/msi.c index e0e64c2d9e060603e738ff570456fe5d903be4ee..a87ef4d7528264d8e6e425ec17d4745cbb0c3236 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -40,7 +40,7 @@ * * Setting this flag to false will remove MSI/MSI-X capability from all devices. * - * It is preferrable for controllers to set this to true (non-broken) even if + * It is preferable for controllers to set this to true (non-broken) even if * they do not actually support MSI/MSI-X: guests normally probe the controller * type and do not attempt to enable MSI/MSI-X with interrupt controllers not * supporting such, so removing the capability is not required, and diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 3cf30bd3342d18dded3e8c9c105de8c5e2bac377..5118ef404f6f71d2b9330391aaa1dc88bcae71ce 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -116,7 +116,7 @@ pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type) return base; } -/* accessor funciton to get bridge filtering limit */ +/* accessor function to get bridge filtering limit */ pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type) { pcibus_t limit; diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c index b00edf7fd48a8fe9b95e986314590caf46d1f78e..8fbd50f66045ead45f073cac36c17a6ad6fcb411 100644 --- a/hw/scsi/spapr_vscsi.c +++ b/hw/scsi/spapr_vscsi.c @@ -698,7 +698,7 @@ static void vscsi_inquiry_no_target(VSCSIState *s, vscsi_req *req) uint8_t resp_data[36]; int rc, len, alen; - /* We dont do EVPD. Also check that page_code is 0 */ + /* We don't do EVPD. Also check that page_code is 0 */ if ((cdb[1] & 0x01) || cdb[2] != 0) { /* Send INVALID FIELD IN CDB */ vscsi_makeup_sense(s, req, ILLEGAL_REQUEST, 0x24, 0); diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index e690b4ec0860e65598848720db0400785f6ff90c..f67b5bf7d3ed92cba1712324da7b967a5aac7e6f 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -63,7 +63,7 @@ typedef struct PVSCSIClass { #define PVSCSI_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI) -/* Compatability flags for migration */ +/* Compatibility flags for migration */ #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT 0 #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION \ (1 << PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT) diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c index afe577c76af79fb36ceb159c0475f719876f4457..772f85f5fde067d8bc9a6f1a6450059e3e76c815 100644 --- a/hw/timer/a9gtimer.c +++ b/hw/timer/a9gtimer.c @@ -184,7 +184,7 @@ static void a9_gtimer_write(void *opaque, hwaddr addr, uint64_t value, case R_COUNTER_LO: /* * Keep it simple - ARM docco explicitly says to disable timer before - * modding it, so dont bother trying to do all the difficult on the fly + * modding it, so don't bother trying to do all the difficult on the fly * timer modifications - (if they even work in real hardware??). */ if (s->control & R_CONTROL_TIMER_ENABLE) { diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 51e8303cdaa3a96c6b58203615e49a5cbdc3c44f..ebec35935db88668fdf885b0adf0e0024d585883 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -187,7 +187,7 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg, } /* Control register operations are broken out into helpers that can be - * explictly called on aspeed_timer_reset(), but also from + * explicitly called on aspeed_timer_reset(), but also from * aspeed_timer_ctrl_op(). */ @@ -380,7 +380,7 @@ static void aspeed_timer_reset(DeviceState *dev) for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) { AspeedTimer *t = &s->timers[i]; - /* Explictly call helpers to avoid any conditional behaviour through + /* Explicitly call helpers to avoid any conditional behaviour through * aspeed_timer_set_ctrl(). */ aspeed_timer_ctrl_enable(t, false); diff --git a/include/crypto/random.h b/include/crypto/random.h index b3021c4ce6fbe8a9bf2f0f26bff1558e3d5be067..f9308f4647629678920d2f55c9f768bdf37c831c 100644 --- a/include/crypto/random.h +++ b/include/crypto/random.h @@ -34,7 +34,7 @@ * Fill @buf with @buflen bytes of cryptographically strong * random data * - * Returns 0 on sucess, -1 on error + * Returns 0 on success, -1 on error */ int qcrypto_random_bytes(uint8_t *buf, size_t buflen, diff --git a/include/hw/xen/xen_common.h b/include/hw/xen/xen_common.h index bd65e670542903760412b5d94baa11cf45f007d3..7b52e8ffc19e9c276a34488f1ab3916c391cecca 100644 --- a/include/hw/xen/xen_common.h +++ b/include/hw/xen/xen_common.h @@ -26,7 +26,7 @@ * We don't support Xen prior to 4.2.0. */ -/* Xen 4.2 thru 4.6 */ +/* Xen 4.2 through 4.6 */ #if CONFIG_XEN_CTRL_INTERFACE_VERSION < 471 typedef xc_interface xenforeignmemory_handle; diff --git a/include/io/task.h b/include/io/task.h index 2e69d8a47f2d1bcd40b2d71863af7135788c749d..a993212ad97ad0e9e22e9d022facb2719d60c6d1 100644 --- a/include/io/task.h +++ b/include/io/task.h @@ -219,7 +219,7 @@ void qio_task_run_in_thread(QIOTask *task, * qio_task_complete: * @task: the task struct * - * Mark the operation as succesfully completed + * Mark the operation as successfully completed * and free the memory for @task. */ void qio_task_complete(QIOTask *task); diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 1e3221cbec65dbd6c360635da4b7a3840042c5f3..2e930a92ce482ffe1ca890238eb11b03e702cd7a 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -313,7 +313,7 @@ static inline void qemu_timersub(const struct timeval *val1, void qemu_set_cloexec(int fd); /* QEMU "hardware version" setting. Used to replace code that exposed - * QEMU_VERSION to guests in the past and need to keep compatibilty. + * QEMU_VERSION to guests in the past and need to keep compatibility. * Do not use qemu_hw_version() in new code. */ void qemu_set_hw_version(const char *); diff --git a/kvm-all.c b/kvm-all.c index e7b66df197fd5f1418641b4aa3e3f5d16ff7c600..f9ae8f9bf809c891d873c863dd5c2b06b7ab56ec 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -413,7 +413,7 @@ static int kvm_physical_sync_dirty_bitmap(KVMMemoryListener *kml, * userspace memory corruption (which is not detectable by valgrind * too, in most cases). * So for now, let's align to 64 instead of HOST_LONG_BITS here, in - * a hope that sizeof(long) wont become >8 any time soon. + * a hope that sizeof(long) won't become >8 any time soon. */ size = ALIGN(((mem->memory_size) >> TARGET_PAGE_BITS), /*HOST_LONG_BITS*/ 64) / 8; diff --git a/migration/migration.c b/migration/migration.c index 991313a8629a9fbff7785ba35535e2a7535fa597..c08d9a69b089f1477f241815616d3c3b80e5843c 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -278,7 +278,7 @@ static void deferred_incoming_migration(Error **errp) void migrate_send_rp_req_pages(MigrationIncomingState *mis, const char *rbname, ram_addr_t start, size_t len) { - uint8_t bufc[12 + 1 + 255]; /* start (8), len (4), rbname upto 256 */ + uint8_t bufc[12 + 1 + 255]; /* start (8), len (4), rbname up to 256 */ size_t msglen = 12; /* start + len */ *(uint64_t *)bufc = cpu_to_be64((uint64_t)start); diff --git a/migration/ram.c b/migration/ram.c index 3f057388cb03bc32e74643873d2ebb0a8c338fd4..88fbffcce45239befa37577b78f47a6fe4439640 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -1272,7 +1272,7 @@ static int ram_save_target_page(MigrationState *ms, QEMUFile *f, } /** - * ram_save_host_page: Starting at *offset send pages upto the end + * ram_save_host_page: Starting at *offset send pages up to the end * of the current host page. It's valid for the initial * offset to point into the middle of a host page * in which case the remainder of the hostpage is sent. diff --git a/nbd/client.c b/nbd/client.c index 48f2a21f3387ee72bd01c9932c2cfa7c867f8c87..31b88f3a31c00f8be0febfc7b7d52b2c01d2acff 100644 --- a/nbd/client.c +++ b/nbd/client.c @@ -373,7 +373,7 @@ static QIOChannel *nbd_receive_starttls(QIOChannel *ioc, } length = be32_to_cpu(length); if (length != 0) { - error_setg(errp, "Start TLS reponse was not zero %x", + error_setg(errp, "Start TLS response was not zero %x", length); return NULL; } diff --git a/qga/channel-win32.c b/qga/channel-win32.c index bb596612409eb138c35d3453ccbeba835f96abf8..68168d14a53d52fa882d986f30aeb04851242763 100644 --- a/qga/channel-win32.c +++ b/qga/channel-win32.c @@ -77,7 +77,7 @@ static gboolean ga_channel_prepare(GSource *source, gint *timeout_ms) } out: - /* dont block forever, iterate the main loop every once and a while */ + /* don't block forever, iterate the main loop every once in a while */ *timeout_ms = 500; /* if there's data in the read buffer, or another event is pending, * skip polling and issue user cb. diff --git a/qga/commands.c b/qga/commands.c index b653a460b98485708e0221e500d0b9a5910c726a..31444643e2a8241c8997e949216e9abe97fc7eda 100644 --- a/qga/commands.c +++ b/qga/commands.c @@ -182,8 +182,8 @@ GuestExecStatus *qmp_guest_exec_status(int64_t pid, Error **err) */ #ifdef G_OS_WIN32 /* Additionally WIN32 does not provide any additional information - * on whetherthe child exited or terminated via signal. - * We use this simple range check to distingish application exit code + * on whether the child exited or terminated via signal. + * We use this simple range check to distinguish application exit code * (usually value less then 256) and unhandled exception code with * ntstatus (always value greater then 0xC0000005). */ if ((uint32_t)gei->status < 0xC0000000U) { diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index c9554ba644e1398152ccc981a0df2a1868d38dd7..c939a325bca965b3ce74bdce213def7e08715ea2 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -363,7 +363,7 @@ sub sanitise_line { for ($off = 1; $off < length($line); $off++) { $c = substr($line, $off, 1); - # Comments we are wacking completly including the begin + # Comments we are wacking completely including the begin # and end, all to $;. if ($sanitise_quote eq '' && substr($line, $off, 2) eq '/*') { $sanitise_quote = '*/'; diff --git a/slirp/socket.c b/slirp/socket.c index a10eff18cb068e3d0a376bfcbe689390da5bd800..b336586c7b384eb8add1bf5edee01130c0fdd9ac 100644 --- a/slirp/socket.c +++ b/slirp/socket.c @@ -206,7 +206,7 @@ soread(struct socket *so) * We don't test for <= 0 this time, because there legitimately * might not be any more data (since the socket is non-blocking), * a close will be detected on next iteration. - * A return of -1 wont (shouldn't) happen, since it didn't happen above + * A return of -1 won't (shouldn't) happen, since it didn't happen above */ if (n == 2 && nn == iov[0].iov_len) { int ret; diff --git a/target-cris/translate.c b/target-cris/translate.c index f28b1999a7869546b80c82c7825097d5beb60f30..420051e940634ff3224a74062103c1274d2044d3 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3057,7 +3057,7 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) * * When the software returns from an exception, the branch will re-execute. * On QEMU care needs to be taken when a branch+delayslot sequence is broken - * and the branch and delayslot dont share pages. + * and the branch and delayslot don't share pages. * * The TB contaning the branch insn will set up env->btarget and evaluate * env->btaken. When the translation loop exits we will note that the branch @@ -3246,7 +3246,7 @@ void gen_intermediate_code(CPUCRISState *env, struct TranslationBlock *tb) } /* If we are rexecuting a branch due to exceptions on - delay slots dont break. */ + delay slots don't break. */ if (!(tb->pc & 1) && cs->singlestep_enabled) { break; } diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 7607eadfb779ecee5eb9dc3f4f8618f2346bf741..06ba1ef86a629650d1d64a8460c92349eea224ab 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -130,7 +130,7 @@ static void cris_set_prefix(DisasContext *dc) dc->tb_flags |= PFIX_FLAG; tcg_gen_ori_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], PFIX_FLAG); - /* prefix insns dont clear the x flag. */ + /* prefix insns don't clear the x flag. */ dc->clear_x = 0; cris_lock_irq(dc); } diff --git a/target-i386/cpu.c b/target-i386/cpu.c index d0b5b691563c574f30e3aaf47f860d7fd9ff8177..da5d081c0cf155100c3eb831d05809cc6c3f509e 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2523,7 +2523,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, /* The Linux kernel checks for the CMPLegacy bit and * discards multiple thread information if it is set. - * So dont set it here for Intel to make Linux guests happy. + * So don't set it here for Intel to make Linux guests happy. */ if (cs->nr_cores * cs->nr_threads > 1) { if (env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1 || diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 444fda9ce673ccb14c8eee71a0e9c2d10a9b7d82..0e113245e6d40f8e68c64873b8f095056b76fa45 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1366,7 +1366,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access); * If value is NULL, no default will be set and the original * value from the CPU model table will be kept. * - * It is valid to call this funciton only for properties that + * It is valid to call this function only for properties that * are already present in the kvm_default_props table. */ void x86_cpu_change_kvm_default(const char *prop, const char *value); diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 4417e6ba225f7fdabb957e06fb6e80e0e7a78e05..ba847ab3a02cba5b92d28c494f73caad63a920a1 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -581,7 +581,7 @@ static bool mips_vp_is_wfi(MIPSCPU *c) static inline void mips_vpe_wake(MIPSCPU *c) { - /* Dont set ->halted = 0 directly, let it be done via cpu_has_work + /* Don't set ->halted = 0 directly, let it be done via cpu_has_work because there might be other conditions that state that c should be sleeping. */ cpu_interrupt(CPU(c), CPU_INTERRUPT_WAKE); diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 0237e7bea835df956c48a1ffa3770661459d4e50..2d17aebaa31d49e5e989d67828e722ce4a8f4b58 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -2858,7 +2858,7 @@ static void gen_shaci(TCGv ret, TCGv r1, int32_t shift_count) } else if (shift_count == -32) { /* set PSW.C */ tcg_gen_mov_tl(cpu_PSW_C, r1); - /* fill ret completly with sign bit */ + /* fill ret completely with sign bit */ tcg_gen_sari_tl(ret, r1, 31); /* clear PSW.V */ tcg_gen_movi_tl(cpu_PSW_V, 0); diff --git a/tcg/README b/tcg/README index f4a8ac170bf22182e0b7bf67da71499c8e2199bb..ce8bebab37250e7feae4dbcfabfef4b7670490c6 100644 --- a/tcg/README +++ b/tcg/README @@ -473,7 +473,7 @@ On a 32 bit target, all 64 bit operations are converted to 32 bits. A few specific operations must be implemented to allow it (see add2_i32, sub2_i32, brcond2_i32). -On a 64 bit target, the values are transfered between 32 and 64-bit +On a 64 bit target, the values are transferred between 32 and 64-bit registers using the following ops: - trunc_shr_i64_i32 - ext_i32_i64 diff --git a/tests/tcg/cris/check_addo.c b/tests/tcg/cris/check_addo.c index 3d8e789f5a24ade5b06122ac8ebf4b9d15e7ad74..4235e5fc65c5011665c955a7fbbafb8a653b8dc5 100644 --- a/tests/tcg/cris/check_addo.c +++ b/tests/tcg/cris/check_addo.c @@ -51,7 +51,7 @@ int main(void) t = (unsigned char *)x; t -= 32768; p = (unsigned char *) &y.v1; - mb(); /* dont reorder anything beyond here. */ + mb(); /* don't reorder anything beyond here. */ cris_tst_cc_init(); asm volatile ("setf\tzvnc\n"); cris_addo_pi_d(p, t); @@ -62,7 +62,7 @@ int main(void) t += 32770; - mb(); /* dont reorder anything beyond here. */ + mb(); /* don't reorder anything beyond here. */ cris_tst_cc_init(); asm volatile ("setf\tzvnc\n"); cris_addo_pi_w(p, t); @@ -71,7 +71,7 @@ int main(void) if (*r != 0x4455aa77) err(); - mb(); /* dont reorder anything beyond here. */ + mb(); /* don't reorder anything beyond here. */ cris_tst_cc_init(); asm volatile ("setf\tzvnc\n"); cris_addo_d(p, r); @@ -81,7 +81,7 @@ int main(void) if (*r != 0xee19ccff) err(); - mb(); /* dont reorder anything beyond here. */ + mb(); /* don't reorder anything beyond here. */ cris_tst_cc_init(); asm volatile ("setf\tzvnc\n"); cris_addo_pi_b(p, t); @@ -90,7 +90,7 @@ int main(void) if (*(uint16_t*)r != 0xff22) err(); - mb(); /* dont reorder anything beyond here. */ + mb(); /* don't reorder anything beyond here. */ cris_tst_cc_init(); asm volatile ("setf\tzvnc\n"); cris_addo_b(p, r); @@ -100,7 +100,7 @@ int main(void) if (*r != 0x4455aa77) err(); - mb(); /* dont reorder anything beyond here. */ + mb(); /* don't reorder anything beyond here. */ cris_tst_cc_init(); asm volatile ("setf\tzvnc\n"); cris_addo_w(p, r); @@ -110,7 +110,7 @@ int main(void) if (*r != 0xff224455) err(); - mb(); /* dont reorder anything beyond here. */ + mb(); /* don't reorder anything beyond here. */ cris_tst_cc_init(); asm volatile ("setf\tzvnc\n"); cris_addo_pi_d(p, t); diff --git a/trace/simple.c b/trace/simple.c index 3fdcc82263b6f27ce9c105edc9b2220947ed6732..2f09dafcbc2d5d436970e88ada38eaa074f10486 100644 --- a/trace/simple.c +++ b/trace/simple.c @@ -108,7 +108,7 @@ static bool get_trace_record(unsigned int idx, TraceRecord **recordptr) smp_rmb(); /* read memory barrier before accessing record */ /* read the record header to know record length */ read_from_buffer(idx, &record, sizeof(TraceRecord)); - *recordptr = malloc(record.length); /* dont use g_malloc, can deadlock when traced */ + *recordptr = malloc(record.length); /* don't use g_malloc, can deadlock when traced */ /* make a copy of record to avoid being overwritten */ read_from_buffer(idx, *recordptr, record.length); smp_rmb(); /* memory barrier before clearing valid flag */ @@ -180,7 +180,7 @@ static gpointer writeout_thread(gpointer opaque) while (get_trace_record(idx, &recordptr)) { unused = fwrite(recordptr, recordptr->length, 1, trace_fp); writeout_idx += recordptr->length; - free(recordptr); /* dont use g_free, can deadlock when traced */ + free(recordptr); /* don't use g_free, can deadlock when traced */ idx = writeout_idx % TRACE_BUF_LEN; } diff --git a/ui/cocoa.m b/ui/cocoa.m index 60a7c07eca487a1195f36cf60e8acff40587fe56..36c6bf0cb06491174af907d68397f8f65fcf28d8 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -1394,7 +1394,7 @@ static void addRemovableDevicesMenuItems(void) [menuItem setEnabled: NO]; [menu addItem: menuItem]; - /* Loop thru all the block devices in the emulator */ + /* Loop through all the block devices in the emulator */ while (currentDevice) { deviceName = [[NSString stringWithFormat: @"%s", currentDevice->value->device] retain]; diff --git a/util/timed-average.c b/util/timed-average.c index 2eef9cbb19f1505bd3a9b66e15b608c805c625f5..2b49d532ceef308c57c18cfc84ce8d3f8c98f722 100644 --- a/util/timed-average.c +++ b/util/timed-average.c @@ -8,9 +8,9 @@ * Benoît Canet * Alberto Garcia * - * This program is free sofware: you can redistribute it and/or modify + * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by - * the Free Sofware Foundation, either version 2 of the License, or + * the Free Software Foundation, either version 2 of the License, or * (at your option) version 3 or any later version. * * This program is distributed in the hope that it will be useful,