target-ppc: convert trap instructions to TCG

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5788 c046a42c-6fe2-441c-8c8c-71466251a162

target-ppc/helper.h

@@ -2,6 +2,10 @@
 
 DEF_HELPER_2(raise_exception_err, void, i32, i32)
 DEF_HELPER_0(raise_debug, void)
+DEF_HELPER_3(tw, void, tl, tl, i32)
+#if defined(TARGET_PPC64)
+DEF_HELPER_3(td, void, tl, tl, i32)
+#endif
 
 DEF_HELPER_2(fcmpo, i32, i64, i64)
 DEF_HELPER_2(fcmpu, i32, i64, i64)

target-ppc/op.c

@@ -334,21 +334,6 @@ void OPPROTO op_store_excp_vector (void)
 }
 #endif
 
-/* Trap word */
-void OPPROTO op_tw (void)
-{
-    do_tw(PARAM1);
-    RETURN();
-}
-
-#if defined(TARGET_PPC64)
-void OPPROTO op_td (void)
-{
-    do_td(PARAM1);
-    RETURN();
-}
-#endif
-
 #if !defined(CONFIG_USER_ONLY)
 /* tlbia */
 void OPPROTO op_tlbia (void)

target-ppc/op_helper.c

@@ -1424,25 +1424,25 @@ void do_hrfid (void)
 #endif
 #endif
 
-void do_tw (int flags)
+void helper_tw (target_ulong arg1, target_ulong arg2, uint32_t flags)
 {
-    if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) ||
-                  ((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) ||
-                  ((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) ||
-                  ((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) ||
-                  ((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) {
+    if (!likely(!(((int32_t)arg1 < (int32_t)arg2 && (flags & 0x10)) ||
+                  ((int32_t)arg1 > (int32_t)arg2 && (flags & 0x08)) ||
+                  ((int32_t)arg1 == (int32_t)arg2 && (flags & 0x04)) ||
+                  ((uint32_t)arg1 < (uint32_t)arg2 && (flags & 0x02)) ||
+                  ((uint32_t)arg1 > (uint32_t)arg2 && (flags & 0x01))))) {
         raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP);
     }
 }
 
 #if defined(TARGET_PPC64)
-void do_td (int flags)
+void helper_td (target_ulong arg1, target_ulong arg2, uint32_t flags)
 {
-    if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) ||
-                  ((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) ||
-                  ((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) ||
-                  ((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) ||
-                  ((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01)))))
+    if (!likely(!(((int64_t)arg1 < (int64_t)arg2 && (flags & 0x10)) ||
+                  ((int64_t)arg1 > (int64_t)arg2 && (flags & 0x08)) ||
+                  ((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) ||
+                  ((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) ||
+                  ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01)))))
         raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP);
 }
 #endif

target-ppc/op_helper.h

@@ -60,10 +60,6 @@ target_ulong ppc_load_dump_spr (int sprn);
 void ppc_store_dump_spr (int sprn, target_ulong val);
 
 /* Misc */
-void do_tw (int flags);
-#if defined(TARGET_PPC64)
-void do_td (int flags);
-#endif
 #if !defined(CONFIG_USER_ONLY)
 void do_store_msr (void);
 void do_rfi (void);

target-ppc/translate.c

@@ -3819,42 +3819,46 @@ GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFF01D, PPC_FLOW)
 /* tw */
 GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW)
 {
-    tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
-    tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
+    TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
     /* Update the nip since this might generate a trap exception */
     gen_update_nip(ctx, ctx->nip);
-    gen_op_tw(TO(ctx->opcode));
+    gen_helper_tw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0);
+    tcg_temp_free_i32(t0);
 }
 
 /* twi */
 GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW)
 {
-    tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
-    tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
+    TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
+    TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
     /* Update the nip since this might generate a trap exception */
     gen_update_nip(ctx, ctx->nip);
-    gen_op_tw(TO(ctx->opcode));
+    gen_helper_tw(cpu_gpr[rA(ctx->opcode)], t0, t1);
+    tcg_temp_free(t0);
+    tcg_temp_free_i32(t1);
 }
 
 #if defined(TARGET_PPC64)
 /* td */
 GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B)
 {
-    tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
-    tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
+    TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode));
     /* Update the nip since this might generate a trap exception */
     gen_update_nip(ctx, ctx->nip);
-    gen_op_td(TO(ctx->opcode));
+    gen_helper_td(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0);
+    tcg_temp_free_i32(t0);
 }
 
 /* tdi */
 GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B)
 {
-    tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]);
-    tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
+    TCGv t0 = tcg_const_tl(SIMM(ctx->opcode));
+    TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode));
     /* Update the nip since this might generate a trap exception */
     gen_update_nip(ctx, ctx->nip);
-    gen_op_td(TO(ctx->opcode));
+    gen_helper_td(cpu_gpr[rA(ctx->opcode)], t0, t1);
+    tcg_temp_free(t0);
+    tcg_temp_free_i32(t1);
 }
 #endif