提交 c0caec17 编写于 作者: A Anthony Liguori

Merge remote-tracking branch 'mst/tags/for_anthony' into staging

pc very last minute fixes for 1.7

This has a fix for a crasher bug with pci bridges,
boot failure fix for s390 on 32 bit hosts,
and fixes build for hosts with old glib.

There's also a fix for --iasl configure flag - it can be used
to work around broken iasl on some systems either
by using a non-standard iasl or by disabling it.

I've also reverted a e1000/rtl mac programming change
that seems slightly wrong and too risky for 1.8.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Mon 25 Nov 2013 03:40:07 AM PST using RSA key ID D28D5469
# gpg: Can't check signature: public key not found

# By Michael S. Tsirkin (5) and Bandan Das (1)
# Via Michael S. Tsirkin
* mst/tags/for_anthony:
  configure: make --iasl option actually work
  Revert "e1000/rtl8139: update HMP NIC when every bit is written"
  acpi-build: fix build on glib < 2.14
  acpi-build: fix build on glib < 2.22
  pci: unregister vmstate_pcibus on unplug
  s390x: fix flat file load on 32 bit systems

Message-id: 1385379990-32093-1-git-send-email-mst@redhat.com
Signed-off-by: NAnthony Liguori <aliguori@amazon.com>
...@@ -272,8 +272,6 @@ for opt do ...@@ -272,8 +272,6 @@ for opt do
;; ;;
--cxx=*) CXX="$optarg" --cxx=*) CXX="$optarg"
;; ;;
--iasl=*) iasl="$optarg"
;;
--source-path=*) source_path="$optarg" --source-path=*) source_path="$optarg"
;; ;;
--cpu=*) cpu="$optarg" --cpu=*) cpu="$optarg"
...@@ -652,6 +650,8 @@ for opt do ...@@ -652,6 +650,8 @@ for opt do
;; ;;
--cxx=*) --cxx=*)
;; ;;
--iasl=*) iasl="$optarg"
;;
--objcc=*) objcc="$optarg" --objcc=*) objcc="$optarg"
;; ;;
--make=*) make="$optarg" --make=*) make="$optarg"
......
...@@ -1106,7 +1106,7 @@ mac_writereg(E1000State *s, int index, uint32_t val) ...@@ -1106,7 +1106,7 @@ mac_writereg(E1000State *s, int index, uint32_t val)
s->mac_reg[index] = val; s->mac_reg[index] = val;
if (index == RA || index == RA + 1) { if (index == RA + 1) {
macaddr[0] = cpu_to_le32(s->mac_reg[RA]); macaddr[0] = cpu_to_le32(s->mac_reg[RA]);
macaddr[1] = cpu_to_le32(s->mac_reg[RA + 1]); macaddr[1] = cpu_to_le32(s->mac_reg[RA + 1]);
qemu_format_nic_info_str(qemu_get_queue(s->nic), (uint8_t *)macaddr); qemu_format_nic_info_str(qemu_get_queue(s->nic), (uint8_t *)macaddr);
......
...@@ -2741,7 +2741,10 @@ static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val) ...@@ -2741,7 +2741,10 @@ static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val)
switch (addr) switch (addr)
{ {
case MAC0 ... MAC0+5: case MAC0 ... MAC0+4:
s->phys[addr - MAC0] = val;
break;
case MAC0+5:
s->phys[addr - MAC0] = val; s->phys[addr - MAC0] = val;
qemu_format_nic_info_str(qemu_get_queue(s->nic), s->phys); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->phys);
break; break;
......
...@@ -47,6 +47,7 @@ static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent); ...@@ -47,6 +47,7 @@ static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent);
static char *pcibus_get_dev_path(DeviceState *dev); static char *pcibus_get_dev_path(DeviceState *dev);
static char *pcibus_get_fw_dev_path(DeviceState *dev); static char *pcibus_get_fw_dev_path(DeviceState *dev);
static int pcibus_reset(BusState *qbus); static int pcibus_reset(BusState *qbus);
static void pci_bus_finalize(Object *obj);
static Property pci_props[] = { static Property pci_props[] = {
DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1),
...@@ -73,6 +74,7 @@ static const TypeInfo pci_bus_info = { ...@@ -73,6 +74,7 @@ static const TypeInfo pci_bus_info = {
.name = TYPE_PCI_BUS, .name = TYPE_PCI_BUS,
.parent = TYPE_BUS, .parent = TYPE_BUS,
.instance_size = sizeof(PCIBus), .instance_size = sizeof(PCIBus),
.instance_finalize = pci_bus_finalize,
.class_init = pci_bus_class_init, .class_init = pci_bus_class_init,
}; };
...@@ -375,6 +377,12 @@ int pci_bus_num(PCIBus *s) ...@@ -375,6 +377,12 @@ int pci_bus_num(PCIBus *s)
return s->parent_dev->config[PCI_SECONDARY_BUS]; return s->parent_dev->config[PCI_SECONDARY_BUS];
} }
static void pci_bus_finalize(Object *obj)
{
PCIBus *bus = PCI_BUS(obj);
vmstate_unregister(NULL, &vmstate_pcibus, bus);
}
static int get_pci_config_device(QEMUFile *f, void *pv, size_t size) static int get_pci_config_device(QEMUFile *f, void *pv, size_t size)
{ {
PCIDevice *s = container_of(pv, PCIDevice, config); PCIDevice *s = container_of(pv, PCIDevice, config);
......
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