Merge remote-tracking branch 'yongbok/tags/mips-20161204' into staging

MIPS patches 2016-12-04

Changes:
* Fix Loongson instructions
* Fix bad shifts in {dextp|dextpdp}

# gpg: Signature made Sun 04 Dec 2016 01:39:38 AM GMT
# gpg:                using RSA key 0x2238EB86D5F797C2
# gpg: Can't check signature: public key not found

* yongbok/tags/mips-20161204:
  target-mips: fix bad shifts in {dextp|dextpdp}
  target-mips: Fix Loongson multimedia instructions.
  target-mips: Fix Loongson multimedia 'or' instruction.
  target-mips: Fix Loongson pandn instruction.

Message-id: 1480816817-53245-1-git-send-email-yongbok.kim@imgtec.com
Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>

target-mips/dsp_helper.c

@@ -3477,7 +3477,7 @@ target_ulong helper_dextp(target_ulong ac, target_ulong size, CPUMIPSState *env)
 
     if (sub >= -1) {
         temp = (tempB << (64 - len)) | (tempA >> len);
-        temp = temp & ((0x01 << (size + 1)) - 1);
+        temp = temp & ((1ULL << (size + 1)) - 1);
         set_DSPControl_efi(0, env);
     } else {
         set_DSPControl_efi(1, env);
@@ -3506,7 +3506,7 @@ target_ulong helper_dextpdp(target_ulong ac, target_ulong size,
 
     if (sub >= -1) {
         temp = (tempB << (64 - len)) | (tempA >> len);
-        temp = temp & ((0x01 << (size + 1)) - 1);
+        temp = temp & ((1ULL << (size + 1)) - 1);
         set_DSPControl_pos(sub, env);
         set_DSPControl_efi(0, env);
     } else {

target-mips/translate.c

@@ -3871,6 +3871,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
         break;
     }
 
+    check_cp1_enabled(ctx);
     gen_load_fpr64(ctx, t0, rs);
     gen_load_fpr64(ctx, t1, rt);
 
@@ -3945,8 +3946,11 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
     LMI_DIRECT(XOR_CP2, xor, xor);
     LMI_DIRECT(NOR_CP2, nor, nor);
     LMI_DIRECT(AND_CP2, and, and);
-    LMI_DIRECT(PANDN, pandn, andc);
-    LMI_DIRECT(OR, or, or);
+    LMI_DIRECT(OR_CP2, or, or);
+
+    case OPC_PANDN:
+        tcg_gen_andc_i64(t0, t1, t0);
+        break;
 
     case OPC_PINSRH_0:
         tcg_gen_deposit_i64(t0, t0, t1, 0, 16);