提交 a88a3f88 编写于 作者: J Jan Beulich 提交者: Stefano Stabellini

xen/pt: add a few PCI config space field descriptions

Since the next patch will turn all not explicitly described fields
read-only by default, those fields that have guest writable bits need
to be given explicit descriptors.

This is a preparatory patch for XSA-131.
Signed-off-by: NJan Beulich <jbeulich@suse.com>
上级 0ad3393a
...@@ -753,6 +753,15 @@ static XenPTRegInfo xen_pt_emu_reg_vpd[] = { ...@@ -753,6 +753,15 @@ static XenPTRegInfo xen_pt_emu_reg_vpd[] = {
.u.b.read = xen_pt_byte_reg_read, .u.b.read = xen_pt_byte_reg_read,
.u.b.write = xen_pt_byte_reg_write, .u.b.write = xen_pt_byte_reg_write,
}, },
{
.offset = PCI_VPD_ADDR,
.size = 2,
.ro_mask = 0x0003,
.emu_mask = 0x0003,
.init = xen_pt_common_reg_init,
.u.w.read = xen_pt_word_reg_read,
.u.w.write = xen_pt_word_reg_write,
},
{ {
.size = 0, .size = 0,
}, },
...@@ -889,6 +898,16 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = { ...@@ -889,6 +898,16 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = {
.u.w.read = xen_pt_word_reg_read, .u.w.read = xen_pt_word_reg_read,
.u.w.write = xen_pt_word_reg_write, .u.w.write = xen_pt_word_reg_write,
}, },
/* Device Status reg */
{
.offset = PCI_EXP_DEVSTA,
.size = 2,
.res_mask = 0xFFC0,
.ro_mask = 0x0030,
.init = xen_pt_common_reg_init,
.u.w.read = xen_pt_word_reg_read,
.u.w.write = xen_pt_word_reg_write,
},
/* Link Control reg */ /* Link Control reg */
{ {
.offset = PCI_EXP_LNKCTL, .offset = PCI_EXP_LNKCTL,
...@@ -900,6 +919,15 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = { ...@@ -900,6 +919,15 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = {
.u.w.read = xen_pt_word_reg_read, .u.w.read = xen_pt_word_reg_read,
.u.w.write = xen_pt_word_reg_write, .u.w.write = xen_pt_word_reg_write,
}, },
/* Link Status reg */
{
.offset = PCI_EXP_LNKSTA,
.size = 2,
.ro_mask = 0x3FFF,
.init = xen_pt_common_reg_init,
.u.w.read = xen_pt_word_reg_read,
.u.w.write = xen_pt_word_reg_write,
},
/* Device Control 2 reg */ /* Device Control 2 reg */
{ {
.offset = 0x28, .offset = 0x28,
......
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