diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 18609c449c62d04d29197238aafc8972d08768c1..037a72ce4ef86ab25d480391c1691d9c9d264a40 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -34,13 +34,6 @@ void helper_debug(CPUState *env) cpu_loop_exit(env); } -void helper_shutdown(void) -{ -#if !defined(CONFIG_USER_ONLY) - qemu_system_shutdown_request(); -#endif -} - #ifdef TARGET_SPARC64 target_ulong helper_popc(target_ulong val) { diff --git a/target-sparc/helper.h b/target-sparc/helper.h index faaf8dc7ada61c49aa2443273919722e054dc482..1f67b08065c022ef80c9ac491530ba652035850e 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -79,7 +79,6 @@ DEF_HELPER_1(fcmpeq_fcc2, void, env) DEF_HELPER_1(fcmpeq_fcc3, void, env) #endif DEF_HELPER_2(raise_exception, void, env, int) -DEF_HELPER_0(shutdown, void) #define F_HELPER_0_1(name) DEF_HELPER_1(f ## name, void, env) DEF_HELPER_3(faddd, f64, env, f64, f64) diff --git a/target-sparc/int32_helper.c b/target-sparc/int32_helper.c index 3a749bf5dfeb9008a74f5a7c8150e7151cf7eae1..ac9d01ecbaf47a274ed7ded6aa1bbf4a8257096f 100644 --- a/target-sparc/int32_helper.c +++ b/target-sparc/int32_helper.c @@ -19,6 +19,7 @@ #include "cpu.h" #include "trace.h" +#include "sysemu.h" //#define DEBUG_PCALL @@ -100,8 +101,13 @@ void do_interrupt(CPUState *env) #endif #if !defined(CONFIG_USER_ONLY) if (env->psret == 0) { - cpu_abort(env, "Trap 0x%02x while interrupts disabled, Error state", - env->exception_index); + if (env->exception_index == 0x80 && + env->def->features & CPU_FEATURE_TA0_SHUTDOWN) { + qemu_system_shutdown_request(); + } else { + cpu_abort(env, "Trap 0x%02x while interrupts disabled, Error state", + env->exception_index); + } return; } #endif diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 93185402fdc3c73b5078040cad892606bfae34c9..d26111209e388dee20f21e174db7b298a85d1171 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2518,15 +2518,8 @@ static void disas_sparc_insn(DisasContext * dc) tcg_gen_andi_tl(cpu_dst, cpu_dst, V8_TRAP_MASK); tcg_gen_addi_tl(cpu_dst, cpu_dst, TT_TRAP); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); + gen_helper_raise_exception(cpu_env, cpu_tmp32); - if (rs2 == 0 && - dc->def->features & CPU_FEATURE_TA0_SHUTDOWN) { - - gen_helper_shutdown(); - - } else { - gen_helper_raise_exception(cpu_env, cpu_tmp32); - } } else if (cond != 0) { TCGv r_cond = tcg_temp_new(); int l1;