diff --git a/target-arm/translate.c b/target-arm/translate.c
index 057b1807c210c6deb8349c74bbea1482219d7f98..3899d0ac25917afdded810c5b965be51a10cbdd3 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6493,18 +6493,18 @@ static void gen_logicq_cc(TCGv_i32 lo, TCGv_i32 hi)
 static void gen_load_exclusive(DisasContext *s, int rt, int rt2,
                                TCGv_i32 addr, int size)
 {
-    TCGv_i32 tmp;
+    TCGv_i32 tmp = tcg_temp_new_i32();
 
     switch (size) {
     case 0:
-        tmp = gen_ld8u(addr, IS_USER(s));
+        tcg_gen_qemu_ld8u(tmp, addr, IS_USER(s));
         break;
     case 1:
-        tmp = gen_ld16u(addr, IS_USER(s));
+        tcg_gen_qemu_ld16u(tmp, addr, IS_USER(s));
         break;
     case 2:
     case 3:
-        tmp = gen_ld32(addr, IS_USER(s));
+        tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
         break;
     default:
         abort();
@@ -6514,7 +6514,8 @@ static void gen_load_exclusive(DisasContext *s, int rt, int rt2,
     if (size == 3) {
         TCGv_i32 tmp2 = tcg_temp_new_i32();
         tcg_gen_addi_i32(tmp2, addr, 4);
-        tmp = gen_ld32(tmp2, IS_USER(s));
+        tmp = tcg_temp_new_i32();
+        tcg_gen_qemu_ld32u(tmp, tmp2, IS_USER(s));
         tcg_temp_free_i32(tmp2);
         tcg_gen_mov_i32(cpu_exclusive_high, tmp);
         store_reg(s, rt2, tmp);
@@ -6553,16 +6554,17 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
     fail_label = gen_new_label();
     done_label = gen_new_label();
     tcg_gen_brcond_i32(TCG_COND_NE, addr, cpu_exclusive_addr, fail_label);
+    tmp = tcg_temp_new_i32();
     switch (size) {
     case 0:
-        tmp = gen_ld8u(addr, IS_USER(s));
+        tcg_gen_qemu_ld8u(tmp, addr, IS_USER(s));
         break;
     case 1:
-        tmp = gen_ld16u(addr, IS_USER(s));
+        tcg_gen_qemu_ld16u(tmp, addr, IS_USER(s));
         break;
     case 2:
     case 3:
-        tmp = gen_ld32(addr, IS_USER(s));
+        tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s));
         break;
     default:
         abort();
@@ -6572,7 +6574,8 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
     if (size == 3) {
         TCGv_i32 tmp2 = tcg_temp_new_i32();
         tcg_gen_addi_i32(tmp2, addr, 4);
-        tmp = gen_ld32(tmp2, IS_USER(s));
+        tmp = tcg_temp_new_i32();
+        tcg_gen_qemu_ld32u(tmp, tmp2, IS_USER(s));
         tcg_temp_free_i32(tmp2);
         tcg_gen_brcond_i32(TCG_COND_NE, tmp, cpu_exclusive_high, fail_label);
         tcg_temp_free_i32(tmp);
@@ -6580,22 +6583,24 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
     tmp = load_reg(s, rt);
     switch (size) {
     case 0:
-        gen_st8(tmp, addr, IS_USER(s));
+        tcg_gen_qemu_st8(tmp, addr, IS_USER(s));
         break;
     case 1:
-        gen_st16(tmp, addr, IS_USER(s));
+        tcg_gen_qemu_st16(tmp, addr, IS_USER(s));
         break;
     case 2:
     case 3:
-        gen_st32(tmp, addr, IS_USER(s));
+        tcg_gen_qemu_st32(tmp, addr, IS_USER(s));
         break;
     default:
         abort();
     }
+    tcg_temp_free_i32(tmp);
     if (size == 3) {
         tcg_gen_addi_i32(addr, addr, 4);
         tmp = load_reg(s, rt2);
-        gen_st32(tmp, addr, IS_USER(s));
+        tcg_gen_qemu_st32(tmp, addr, IS_USER(s));
+        tcg_temp_free_i32(tmp);
     }
     tcg_gen_movi_i32(cpu_R[rd], 0);
     tcg_gen_br(done_label);