diff --git a/hw/apic.c b/hw/apic.c
index 82b858486b1f9897b517dbd6a1790557add6bb23..486b9bf8769971024a1a699eae3203559b98328f 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -100,6 +100,18 @@ uint64_t cpu_get_apic_base(CPUState *env)
     return s->apicbase;
 }
 
+void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
+{
+    APICState *s = env->apic_state;
+    s->tpr = (val & 0x0f) << 4;
+}
+
+uint8_t cpu_get_apic_tpr(CPUX86State *env)
+{
+    APICState *s = env->apic_state;
+    return s->tpr >> 4;
+}
+
 /* return -1 if no bit is set */
 static int get_highest_priority_int(uint32_t *tab)
 {
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 25af117a5f6310eacb117d8268cc550d0f2bb5e9..781be2838eaaa907f77a301c0654704f4064ba60 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -509,15 +509,6 @@ typedef struct CPUX86State {
     void *opaque;
 } CPUX86State;
 
-#ifndef IN_OP_I386
-void cpu_x86_outb(CPUX86State *env, int addr, int val);
-void cpu_x86_outw(CPUX86State *env, int addr, int val);
-void cpu_x86_outl(CPUX86State *env, int addr, int val);
-int cpu_x86_inb(CPUX86State *env, int addr);
-int cpu_x86_inw(CPUX86State *env, int addr);
-int cpu_x86_inl(CPUX86State *env, int addr);
-#endif
-
 CPUX86State *cpu_x86_init(void);
 int cpu_x86_exec(CPUX86State *s);
 void cpu_x86_close(CPUX86State *s);
@@ -615,6 +606,10 @@ uint64_t cpu_get_tsc(CPUX86State *env);
 
 void cpu_set_apic_base(CPUX86State *env, uint64_t val);
 uint64_t cpu_get_apic_base(CPUX86State *env);
+void cpu_set_apic_tpr(CPUX86State *env, uint8_t val);
+#ifndef NO_CPU_IO_DEFS
+uint8_t cpu_get_apic_tpr(CPUX86State *env);
+#endif
 
 /* will be suppressed */
 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 17ce6fa6032bfb48a91b3b0b0703f4494a176260..f8449e42006fd05b420717e38a83ea201c914080 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -5631,17 +5631,20 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
             case 2:
             case 3:
             case 4:
+            case 8:
                 if (b & 2) {
                     gen_op_mov_TN_reg[ot][0][rm]();
                     gen_op_movl_crN_T0(reg);
                     gen_jmp_im(s->pc - s->cs_base);
                     gen_eob(s);
                 } else {
-                    gen_op_movtl_T0_env(offsetof(CPUX86State,cr[reg]));
+                    if (reg == 8)
+                        gen_op_movtl_T0_cr8();
+                    else
+                        gen_op_movtl_T0_env(offsetof(CPUX86State,cr[reg]));
                     gen_op_mov_reg_T0[ot][rm]();
                 }
                 break;
-                /* XXX: add CR8 for x86_64 */
             default:
                 goto illegal_op;
             }