diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/Makefile index 97ca2a671c7db76722b9fed132e4e5c4acf20a46..27ee5d5f54a3abf6919e6c0ec3a8647350c270b1 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -11,6 +11,7 @@ CFLAGS = -Wall -mabi=32 -march=r5900 -static TESTCASES = div1.tst TESTCASES += divu1.tst TESTCASES += madd.tst +TESTCASES += maddu.tst TESTCASES += mflohi1.tst TESTCASES += mtlohi1.tst TESTCASES += mult.tst diff --git a/tests/tcg/mips/mipsr5900/maddu.c b/tests/tcg/mips/mipsr5900/maddu.c new file mode 100644 index 0000000000000000000000000000000000000000..e4e552102da39aeebb9c4f71b921068dab46946a --- /dev/null +++ b/tests/tcg/mips/mipsr5900/maddu.c @@ -0,0 +1,37 @@ +/* + * Test R5900-specific three-operand MADDU. + */ + +#include +#include +#include + +uint64_t maddu(uint64_t a, uint32_t rs, uint32_t rt) +{ + uint32_t lo = a; + uint32_t hi = a >> 32; + uint32_t rd; + uint64_t r; + + __asm__ __volatile__ ( + " mtlo %5\n" + " mthi %6\n" + " maddu %0, %3, %4\n" + " mflo %1\n" + " mfhi %2\n" + : "=r" (rd), "=r" (lo), "=r" (hi) + : "r" (rs), "r" (rt), "r" (lo), "r" (hi)); + r = ((uint64_t)hi << 32) | (uint32_t)lo; + + assert(a + (uint64_t)rs * rt == r); + assert(rd == lo); + + return r; +} + +int main() +{ + assert(maddu(13, 17, 19) == 336); + + return 0; +}