diff --git a/hw/m48t59.c b/hw/m48t59.c
index da61313f1e76f90b24d4ec423314f7cc84990ec3..34979ad1089b6bcc27010b57aa3ef9570974f002 100644
--- a/hw/m48t59.c
+++ b/hw/m48t59.c
@@ -199,8 +199,9 @@ static void set_up_watchdog (m48t59_t *NVRAM, uint8_t value)
 }
 
 /* Direct access to NVRAM */
-void m48t59_write (m48t59_t *NVRAM, uint32_t addr, uint32_t val)
+void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
 {
+    m48t59_t *NVRAM = opaque;
     struct tm tm;
     int tmp;
 
@@ -357,8 +358,9 @@ void m48t59_write (m48t59_t *NVRAM, uint32_t addr, uint32_t val)
     }
 }
 
-uint32_t m48t59_read (m48t59_t *NVRAM, uint32_t addr)
+uint32_t m48t59_read (void *opaque, uint32_t addr)
 {
+    m48t59_t *NVRAM = opaque;
     struct tm tm;
     uint32_t retval = 0xFF;
 
@@ -451,13 +453,17 @@ uint32_t m48t59_read (m48t59_t *NVRAM, uint32_t addr)
     return retval;
 }
 
-void m48t59_set_addr (m48t59_t *NVRAM, uint32_t addr)
+void m48t59_set_addr (void *opaque, uint32_t addr)
 {
+    m48t59_t *NVRAM = opaque;
+
     NVRAM->addr = addr;
 }
 
-void m48t59_toggle_lock (m48t59_t *NVRAM, int lock)
+void m48t59_toggle_lock (void *opaque, int lock)
 {
+    m48t59_t *NVRAM = opaque;
+
     NVRAM->lock ^= 1 << lock;
 }
 
diff --git a/hw/m48t59.h b/hw/m48t59.h
index cfe9b2af5e86871d2b33e9e7f3e7ed60b030ab27..f2eb4b1e34d29e64932f00b25bb83aab9eb5368d 100644
--- a/hw/m48t59.h
+++ b/hw/m48t59.h
@@ -3,9 +3,9 @@
 
 typedef struct m48t59_t m48t59_t;
 
-void m48t59_write (m48t59_t *NVRAM, uint32_t addr, uint32_t val);
-uint32_t m48t59_read (m48t59_t *NVRAM, uint32_t addr);
-void m48t59_toggle_lock (m48t59_t *NVRAM, int lock);
+void m48t59_write (void *private, uint32_t addr, uint32_t val);
+uint32_t m48t59_read (void *private, uint32_t addr);
+void m48t59_toggle_lock (void *private, int lock);
 m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base,
                        uint32_t io_base, uint16_t size,
                        int type);