target/cris: Reindent mmu.c

Fix all of the coding style errors in this file at once.
Reviewed-by: NAlistair Francis <alistair.francis@wdc.com>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

target/cris/mmu.c

@@ -43,8 +43,9 @@ static inline unsigned int compute_polynom(unsigned int sr)
     unsigned int f;
 
     f = 0;
-	for (i = 0; i < 16; i++)
+    for (i = 0; i < 16; i++) {
         f += ((SR_POLYNOM >> i) & 1) & ((sr >> i) & 1);
+    }
 
     return f;
 }
@@ -75,10 +76,11 @@ static uint32_t cris_mmu_translate_seg(CPUCRISState *env, int seg)
     uint32_t base;
     int i;
 
-	if (seg < 8)
+    if (seg < 8) {
         base = env->sregs[SFR_RW_MM_KBASE_LO];
-	else
+    } else {
         base = env->sregs[SFR_RW_MM_KBASE_HI];
+    }
 
     i = seg & 7;
     base >>= i * 4;
@@ -87,6 +89,7 @@ static uint32_t cris_mmu_translate_seg(CPUCRISState *env, int seg)
     base <<= 28;
     return base;
 }
+
 /* Used by the tlb decoder.  */
 #define EXTRACT_FIELD(src, start, end)                  \
     (((src) >> start) & ((1 << (end - start + 1)) - 1))
@@ -119,7 +122,7 @@ static void dump_tlb(CPUCRISState *env, int mmu)
             tlb_vpn = EXTRACT_FIELD(hi, 13, 31);
             tlb_pfn = EXTRACT_FIELD(lo, 13, 31);
 
-			printf ("TLB: [%d][%d] hi=%x lo=%x v=%x p=%x\n", 
+            printf("TLB: [%d][%d] hi=%x lo=%x v=%x p=%x\n",
                    set, idx, hi, lo, tlb_vpn, tlb_pfn);
         }
     }
@@ -149,10 +152,17 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
     pid = env->pregs[PR_PID] & 0xff;
 
     switch (rw) {
-		case 2: rwcause = CRIS_MMU_ERR_EXEC; mmu = 0; break;
-		case 1: rwcause = CRIS_MMU_ERR_WRITE; break;
+    case 2:
+        rwcause = CRIS_MMU_ERR_EXEC;
+        mmu = 0;
+        break;
+    case 1:
+        rwcause = CRIS_MMU_ERR_WRITE;
+        break;
     default:
-		case 0: rwcause = CRIS_MMU_ERR_READ; break;
+    case 0:
+        rwcause = CRIS_MMU_ERR_READ;
+        break;
     }
 
     /* I exception vectors 4 - 7, D 8 - 11.  */
@@ -160,25 +170,12 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
 
     vpage = vaddr >> 13;
 
-	/* We know the index which to check on each set.
-	   Scan both I and D.  */
-#if 0
-	for (set = 0; set < 4; set++) {
-		for (idx = 0; idx < 16; idx++) {
-			lo = env->tlbsets[mmu][set][idx].lo;
-			hi = env->tlbsets[mmu][set][idx].hi;
-			tlb_vpn = EXTRACT_FIELD(hi, 13, 31);
-			tlb_pfn = EXTRACT_FIELD(lo, 13, 31);
-
-			printf ("TLB: [%d][%d] hi=%x lo=%x v=%x p=%x\n", 
-					set, idx, hi, lo, tlb_vpn, tlb_pfn);
-		}
-	}
-#endif
-
+    /*
+     * We know the index which to check on each set.
+     * Scan both I and D.
+     */
     idx = vpage & 15;
-	for (set = 0; set < 4; set++)
-	{
+    for (set = 0; set < 4; set++) {
         lo = env->tlbsets[mmu][set][idx].lo;
         hi = env->tlbsets[mmu][set][idx].hi;
 
@@ -188,8 +185,7 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
 
         D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n",
               mmu, set, idx, tlb_vpn, vpage, lo, hi);
-		if ((tlb_g || (tlb_pid == pid))
-		    && tlb_vpn == vpage) {
+        if ((tlb_g || (tlb_pid == pid)) && tlb_vpn == vpage) {
             match = 1;
             break;
         }
@@ -209,33 +205,33 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
         tlb_x = EXTRACT_FIELD(lo, 0, 0);
 
         /*
-		set_exception_vector(0x04, i_mmu_refill);
-		set_exception_vector(0x05, i_mmu_invalid);
-		set_exception_vector(0x06, i_mmu_access);
-		set_exception_vector(0x07, i_mmu_execute);
-		set_exception_vector(0x08, d_mmu_refill);
-		set_exception_vector(0x09, d_mmu_invalid);
-		set_exception_vector(0x0a, d_mmu_access);
-		set_exception_vector(0x0b, d_mmu_write);
+         * set_exception_vector(0x04, i_mmu_refill);
+         * set_exception_vector(0x05, i_mmu_invalid);
+         * set_exception_vector(0x06, i_mmu_access);
+         * set_exception_vector(0x07, i_mmu_execute);
+         * set_exception_vector(0x08, d_mmu_refill);
+         * set_exception_vector(0x09, d_mmu_invalid);
+         * set_exception_vector(0x0a, d_mmu_access);
+         * set_exception_vector(0x0b, d_mmu_write);
          */
         if (cfg_k && tlb_k && usermode) {
-			D(printf ("tlb: kernel protected %x lo=%x pc=%x\n", 
+            D(printf("tlb: kernel protected %x lo=%x pc=%x\n",
                      vaddr, lo, env->pc));
             match = 0;
             res->bf_vec = vect_base + 2;
         } else if (rw == 1 && cfg_w && !tlb_w) {
-			D(printf ("tlb: write protected %x lo=%x pc=%x\n", 
+            D(printf("tlb: write protected %x lo=%x pc=%x\n",
                      vaddr, lo, env->pc));
             match = 0;
             /* write accesses never go through the I mmu.  */
             res->bf_vec = vect_base + 3;
         } else if (rw == 2 && cfg_x && !tlb_x) {
-			D(printf ("tlb: exec protected %x lo=%x pc=%x\n", 
+            D(printf("tlb: exec protected %x lo=%x pc=%x\n",
                      vaddr, lo, env->pc));
             match = 0;
             res->bf_vec = vect_base + 3;
         } else if (cfg_v && !tlb_v) {
-			D(printf ("tlb: invalid %x\n", vaddr));
+            D(printf("tlb: invalid %x\n", vaddr));
             match = 0;
             res->bf_vec = vect_base + 1;
         }
@@ -243,13 +239,15 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
         res->prot = 0;
         if (match) {
             res->prot |= PAGE_READ;
-			if (tlb_w)
+            if (tlb_w) {
                 res->prot |= PAGE_WRITE;
-			if (mmu == 0 && (cfg_x || tlb_x))
+            }
+            if (mmu == 0 && (cfg_x || tlb_x)) {
                 res->prot |= PAGE_EXEC;
             }
-		else
+        } else {
             D(dump_tlb(env, mmu));
+        }
     } else {
         /* If refill, provide a randomized set.  */
         set = env->mmu_rand_lfsr & 3;
@@ -274,7 +272,7 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
         D(printf("refill vaddr=%x pc=%x\n", vaddr, env->pc));
     }
 
-	D(printf ("%s rw=%d mtch=%d pc=%x va=%x vpn=%x tlbvpn=%x pfn=%x pid=%x"
+    D(printf("%s rw=%d mtch=%d pc=%x va=%x vpn=%x tlbvpn=%x pfn=%x pid=%x"
              " %x cause=%x sel=%x sp=%x %x %x\n",
              __func__, rw, match, env->pc,
              vaddr, vpage,
@@ -301,8 +299,7 @@ void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid)
 
     pid &= 0xff;
     for (mmu = 0; mmu < 2; mmu++) {
-		for (set = 0; set < 4; set++)
-		{
+        for (set = 0; set < 4; set++) {
             for (idx = 0; idx < 16; idx++) {
                 lo = env->tlbsets[mmu][set][idx].lo;
                 hi = env->tlbsets[mmu][set][idx].hi;
@@ -314,8 +311,7 @@ void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid)
 
                 if (tlb_v && !tlb_g && (tlb_pid == pid)) {
                     vaddr = tlb_vpn << TARGET_PAGE_BITS;
-					D_LOG("flush pid=%x vaddr=%x\n", 
-						  pid, vaddr);
+                    D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr);
                     tlb_flush_page(CPU(cpu), vaddr);
                 }
             }
@@ -332,7 +328,7 @@ int cris_mmu_translate(struct cris_mmu_result *res,
     int is_user = mmu_idx == MMU_USER_IDX;
     uint32_t old_srs;
 
-	old_srs= env->pregs[PR_SRS];
+    old_srs = env->pregs[PR_SRS];
 
     /* rw == 2 means exec, map the access to the insn mmu.  */
     env->pregs[PR_SRS] = rw == 2 ? 1 : 2;
@@ -344,8 +340,7 @@ int cris_mmu_translate(struct cris_mmu_result *res,
     }
 
     seg = vaddr >> 28;
-	if (!is_user && cris_mmu_segmented_addr(seg, env->sregs[SFR_RW_MM_CFG]))
-	{
+    if (!is_user && cris_mmu_segmented_addr(seg, env->sregs[SFR_RW_MM_CFG])) {
         uint32_t base;
 
         miss = 0;