diff --git a/hw/openpic.c b/hw/openpic.c
index f6cc07bd6e5a53465c4494d1e3a8befd8d1b0644..085c9549d1c6bfd9c9f30e1c6b4fd7bc7ca23079 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -644,6 +644,27 @@ static inline void write_IRQreg_ivpr(OpenPICState *opp, int n_IRQ, uint32_t val)
             opp->src[n_IRQ].ivpr);
 }
 
+static void openpic_gcr_write(OpenPICState *opp, uint64_t val)
+{
+    if (val & GCR_RESET) {
+        openpic_reset(&opp->busdev.qdev);
+    } else if (opp->mpic_mode_mask) {
+        CPUArchState *env;
+        int mpic_proxy = 0;
+
+        opp->gcr &= ~opp->mpic_mode_mask;
+        opp->gcr |= val & opp->mpic_mode_mask;
+
+        /* Set external proxy mode */
+        if ((val & opp->mpic_mode_mask) == GCR_MODE_PROXY) {
+            mpic_proxy = 1;
+        }
+        for (env = first_cpu; env != NULL; env = env->next_cpu) {
+            env->mpic_proxy = mpic_proxy;
+        }
+    }
+}
+
 static void openpic_gbl_write(void *opaque, hwaddr addr, uint64_t val,
                               unsigned len)
 {
@@ -672,23 +693,7 @@ static void openpic_gbl_write(void *opaque, hwaddr addr, uint64_t val,
     case 0x1000: /* FRR */
         break;
     case 0x1020: /* GCR */
-        if (val & GCR_RESET) {
-            openpic_reset(&opp->busdev.qdev);
-        } else if (opp->mpic_mode_mask) {
-            CPUArchState *env;
-            int mpic_proxy = 0;
-
-            opp->gcr &= ~opp->mpic_mode_mask;
-            opp->gcr |= val & opp->mpic_mode_mask;
-
-            /* Set external proxy mode */
-            if ((val & opp->mpic_mode_mask) == GCR_MODE_PROXY) {
-                mpic_proxy = 1;
-            }
-            for (env = first_cpu; env != NULL; env = env->next_cpu) {
-                env->mpic_proxy = mpic_proxy;
-            }
-        }
+        openpic_gcr_write(opp, val);
         break;
     case 0x1080: /* VIR */
         break;