diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 9aa32692a3b5f4f3995fa2bc6146082bf38ba9b8..441e21ed1f2e1966c3ff7a6c17cad41a6ace89ad 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1110,6 +1110,10 @@ static const TypeInfo nvme_info = { .instance_size = sizeof(NvmeCtrl), .class_init = nvme_class_init, .instance_init = nvme_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void nvme_register_types(void) diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index 744f0f3b910490ac57aab1cb098ef212ab9c4716..f1af279e8ddee73a6dba72d7191a69ccc1d73634 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -710,6 +710,10 @@ static const TypeInfo e1000e_info = { .instance_size = sizeof(E1000EState), .class_init = e1000e_class_init, .instance_init = e1000e_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void e1000e_register_types(void) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index da562fe04151e24d2f36834fc42b10bb080e259e..a4d827c99da18eea9e3df2b2cfd047d20433ba33 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -192,6 +192,7 @@ static const TypeInfo pcie_pci_bridge_info = { .class_init = pcie_pci_bridge_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, + { INTERFACE_PCIE_DEVICE }, { }, } }; diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 4d588cb22e215c910918ffa81bc3025cf423fe57..9b6e4ce512e0c1847442f7fcd70186c57bf0c3bf 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -161,6 +161,10 @@ static const TypeInfo rp_info = { .class_init = rp_class_init, .abstract = true, .class_size = sizeof(PCIERootPortClass), + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void rp_register_types(void) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c index 5a882b0433bed191e4707fe8005767e8f452d97f..1e09d2afb79c7b156c28a3336d5da8fb2495399f 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -196,6 +196,10 @@ static const TypeInfo xio3130_downstream_info = { .name = "xio3130-downstream", .parent = TYPE_PCIE_SLOT, .class_init = xio3130_downstream_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void xio3130_downstream_register_types(void) diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c index a052224bbf8cb6cc94496661711f3fcb80e01cf9..227997ce46fa199f4b8d69716c0eed8667788c16 100644 --- a/hw/pci-bridge/xio3130_upstream.c +++ b/hw/pci-bridge/xio3130_upstream.c @@ -166,6 +166,10 @@ static const TypeInfo xio3130_upstream_info = { .name = "x3130-upstream", .parent = TYPE_PCIE_PORT, .class_init = xio3130_upstream_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void xio3130_upstream_register_types(void) diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 4613dda1d2242e9d280f4f7f7ac635a3a3767a42..765925309016786b23bf1db384b99c1a6c195f7f 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -317,6 +317,10 @@ static const TypeInfo xilinx_pcie_root_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(XilinxPCIERoot), .class_init = xilinx_pcie_root_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; static void xilinx_pcie_register(void) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 0db68aacee1f34a0c52d46486bd22872f80e6ee8..535ee267c3c5f209e4dc06c491944fd90487af2c 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2451,6 +2451,7 @@ typedef struct MegasasInfo { int osts; const VMStateDescription *vmsd; Property *props; + InterfaceInfo *interfaces; } MegasasInfo; static struct MegasasInfo megasas_devices[] = { @@ -2480,6 +2481,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = true, .vmsd = &vmstate_megasas_gen2, .props = megasas_properties_gen2, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, } }; @@ -2531,6 +2536,7 @@ static void megasas_register_types(void) type_info.parent = TYPE_MEGASAS_BASE; type_info.class_data = (void *)info; type_info.class_init = megasas_class_init; + type_info.interfaces = info->interfaces; type_register(&type_info); }