From 6abeb6d85e1d6f225178b1d18a306bb75d9e7f92 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 8 Oct 2018 14:55:02 +0100 Subject: [PATCH] target/arm: Correct condition for v8M callee stack push In v7m_exception_taken() we were incorrectly using a "LR bit EXCRET.ES is 1" check when it should be 0 (compare the pseudocode ExceptionTaken() function). This meant we didn't stack the callee-saved registers when tailchaining from a NonSecure to a Secure exception. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20181002145940.30931-1-peter.maydell@linaro.org (cherry picked from commit 7b73a1ca05b33d42278ce29cea4652e22d408165) Signed-off-by: Michael Roth --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 7ee614c04f..cae2b2649d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6858,7 +6858,7 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain, * not already saved. */ if (lr & R_V7M_EXCRET_DCRS_MASK && - !(dotailchain && (lr & R_V7M_EXCRET_ES_MASK))) { + !(dotailchain && !(lr & R_V7M_EXCRET_ES_MASK))) { push_failed = v7m_push_callee_stack(cpu, lr, dotailchain, ignore_stackfaults); } -- GitLab