target/riscv: Fix wrong expanding for c.fswsp
base register is no rs1 not rs2 for fsw. Signed-off-by: NKito Cheng <kito.cheng@gmail.com> Reviewed-by: NPalmer Dabbelt <palmer@sifive.com> Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
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